Searched refs:v_rsq_f32_e32 (Results 1 – 9 of 9) sorted by relevance
| /external/llvm/test/CodeGen/AMDGPU/ |
| D | llvm.AMDGPU.rsq.ll | 8 ; SI: v_rsq_f32_e32 {{v[0-9]+}}, {{s[0-9]+}}
18 ; SI: v_rsq_f32_e32 {{v[0-9]+}}, 4.0
27 ; SI: v_rsq_f32_e32 {{v[0-9]+}}, 0x42c80000
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| D | llvm.amdgcn.rsq.ll | 8 ; SI: v_rsq_f32_e32 {{v[0-9]+}}, {{s[0-9]+}}
17 ; SI: v_rsq_f32_e32 {{v[0-9]+}}, 4.0
25 ; SI: v_rsq_f32_e32 {{v[0-9]+}}, 0x42c80000
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| D | rsq.ll | 9 ; SI: v_rsq_f32_e32
32 ; SI: v_rsq_f32_e32 {{v[0-9]+}}, {{s[0-9]+}}
49 ; SI-UNSAFE-DAG: v_rsq_f32_e32 [[RSQA:v[0-9]+]], [[A]]
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| D | llvm.AMDGPU.rsq.clamped.ll | 13 ; VI-DAG: v_rsq_f32_e32 [[RSQ:v[0-9]+]], {{s[0-9]+}}
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| D | llvm.amdgcn.rsq.clamp.ll | 11 ; VI-DAG: v_rsq_f32_e32 [[RSQ:v[0-9]+]], [[SRC]]
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| D | llvm.amdgcn.rcp.ll | 56 ; SI: v_rsq_f32_e32
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| /external/llvm/test/MC/AMDGPU/ |
| D | vop1.s | 184 v_rsq_f32_e32 v1, v2 label
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| /external/llvm/test/MC/Disassembler/AMDGPU/ |
| D | vop1_vi.txt | 102 # VI: v_rsq_f32_e32 v1, v2 ; encoding: [0x02,0x49,0x02,0x7e]
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| D | vop1.txt | 87 # CHECK: v_rsq_f32_e32 v123, 4.0 ; encoding: [0xf6,0x48,0xf6,0x7e]
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