1; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s 2; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=FUNC %s 3 4declare float @llvm.amdgcn.rsq.clamp.f32(float) #1 5declare double @llvm.amdgcn.rsq.clamp.f64(double) #1 6 7; FUNC-LABEL: {{^}}rsq_clamp_f32: 8; SI: v_rsq_clamp_f32_e32 9 10; VI: s_load_dword [[SRC:s[0-9]+]] 11; VI-DAG: v_rsq_f32_e32 [[RSQ:v[0-9]+]], [[SRC]] 12; VI-DAG: v_min_f32_e32 [[MIN:v[0-9]+]], 0x7f7fffff, [[RSQ]] 13; TODO: this constant should be folded: 14; VI-DAG: v_mov_b32_e32 [[K:v[0-9]+]], 0xff7fffff 15; VI: v_max_f32_e32 [[RESULT:v[0-9]+]], [[MIN]], [[K]] 16; VI: buffer_store_dword [[RESULT]] 17define void @rsq_clamp_f32(float addrspace(1)* %out, float %src) #0 { 18 %rsq_clamp = call float @llvm.amdgcn.rsq.clamp.f32(float %src) 19 store float %rsq_clamp, float addrspace(1)* %out 20 ret void 21} 22 23 24; FUNC-LABEL: {{^}}rsq_clamp_f64: 25; SI: v_rsq_clamp_f64_e32 26 27; TODO: this constant should be folded: 28; VI-DAG: s_mov_b32 s[[LOW1:[0-9+]]], -1 29; VI-DAG: s_mov_b32 s[[HIGH1:[0-9+]]], 0x7fefffff 30; VI-DAG: s_mov_b32 s[[HIGH2:[0-9+]]], 0xffefffff 31; VI-DAG: v_rsq_f64_e32 [[RSQ:v\[[0-9]+:[0-9]+\]]], s[{{[0-9]+:[0-9]+}} 32; VI-DAG: v_min_f64 v[0:1], [[RSQ]], s{{\[}}[[LOW1]]:[[HIGH1]]] 33; VI-DAG: v_max_f64 v[0:1], v[0:1], s{{\[}}[[LOW1]]:[[HIGH2]]] 34define void @rsq_clamp_f64(double addrspace(1)* %out, double %src) #0 { 35 %rsq_clamp = call double @llvm.amdgcn.rsq.clamp.f64(double %src) 36 store double %rsq_clamp, double addrspace(1)* %out 37 ret void 38} 39 40; FUNC-LABEL: {{^}}rsq_clamp_undef_f32: 41; SI-NOT: v_rsq_clamp_f32 42define void @rsq_clamp_undef_f32(float addrspace(1)* %out) #0 { 43 %rsq_clamp = call float @llvm.amdgcn.rsq.clamp.f32(float undef) 44 store float %rsq_clamp, float addrspace(1)* %out 45 ret void 46} 47 48attributes #0 = { nounwind } 49attributes #1 = { nounwind readnone } 50