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Searched refs:vqdmlal (Results 1 – 23 of 23) sorted by relevance

/external/llvm/test/MC/ARM/
Dneon-mul-accum-encoding.s39 vqdmlal.s16 q8, d19, d18
40 vqdmlal.s32 q8, d19, d18
41 vqdmlal.s16 q11, d11, d7[0]
42 vqdmlal.s16 q11, d11, d7[1]
43 vqdmlal.s16 q11, d11, d7[2]
44 vqdmlal.s16 q11, d11, d7[3]
46 @ CHECK: vqdmlal.s16 q8, d19, d18 @ encoding: [0xa2,0x09,0xd3,0xf2]
47 @ CHECK: vqdmlal.s32 q8, d19, d18 @ encoding: [0xa2,0x09,0xe3,0xf2]
48 @ CHECK: vqdmlal.s16 q11, d11, d7[0] @ encoding: [0x47,0x63,0xdb,0xf2]
49 @ CHECK: vqdmlal.s16 q11, d11, d7[1] @ encoding: [0x4f,0x63,0xdb,0xf2]
[all …]
Dneont2-mul-accum-encoding.s43 vqdmlal.s16 q8, d19, d18
44 vqdmlal.s32 q8, d19, d18
45 vqdmlal.s16 q11, d11, d7[0]
46 vqdmlal.s16 q11, d11, d7[1]
47 vqdmlal.s16 q11, d11, d7[2]
48 vqdmlal.s16 q11, d11, d7[3]
50 @ CHECK: vqdmlal.s16 q8, d19, d18 @ encoding: [0xd3,0xef,0xa2,0x09]
51 @ CHECK: vqdmlal.s32 q8, d19, d18 @ encoding: [0xe3,0xef,0xa2,0x09]
52 @ CHECK: vqdmlal.s16 q11, d11, d7[0] @ encoding: [0xdb,0xef,0x47,0x63]
53 @ CHECK: vqdmlal.s16 q11, d11, d7[1] @ encoding: [0xdb,0xef,0x4f,0x63]
[all …]
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dneont2-mul-accum-encoding.s39 vqdmlal.s16 q8, d19, d18
40 vqdmlal.s32 q8, d19, d18
42 @ CHECK: vqdmlal.s16 q8, d19, d18 @ encoding: [0xd3,0xef,0xa2,0x09]
43 @ CHECK: vqdmlal.s32 q8, d19, d18 @ encoding: [0xe3,0xef,0xa2,0x09]
Dneon-mul-accum-encoding.s31 @ CHECK: vqdmlal.s16 q8, d19, d18 @ encoding: [0xa2,0x09,0xd3,0xf2]
32 vqdmlal.s16 q8, d19, d18
33 @ CHECK: vqdmlal.s32 q8, d19, d18 @ encoding: [0xa2,0x09,0xe3,0xf2]
34 vqdmlal.s32 q8, d19, d18
Dneon-mul-encoding.s37 vqdmlal.s16 q8, d19, d18
38 vqdmlal.s32 q8, d19, d18
40 @ CHECK: vqdmlal.s16 q8, d19, d18 @ encoding: [0xa2,0x09,0xd3,0xf2]
41 @ CHECK: vqdmlal.s32 q8, d19, d18 @ encoding: [0xa2,0x09,0xe3,0xf2]
/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/
Dvqdmul.ll202 ;CHECK: vqdmlal.s16
206 …%tmp4 = call <4 x i32> @llvm.arm.neon.vqdmlal.v4i32(<4 x i32> %tmp1, <4 x i16> %tmp2, <4 x i16> %t…
212 ;CHECK: vqdmlal.s32
216 …%tmp4 = call <2 x i64> @llvm.arm.neon.vqdmlal.v2i64(<2 x i64> %tmp1, <2 x i32> %tmp2, <2 x i32> %t…
223 ; CHECK: vqdmlal.s16 q0, d2, d3[1]
225 …%1 = tail call <4 x i32> @llvm.arm.neon.vqdmlal.v4i32(<4 x i32> %arg0_int32x4_t, <4 x i16> %arg1_i…
232 ; CHECK: vqdmlal.s32 q0, d2, d3[1]
234 …%1 = tail call <2 x i64> @llvm.arm.neon.vqdmlal.v2i64(<2 x i64> %arg0_int64x2_t, <2 x i32> %arg1_i…
238 declare <4 x i32> @llvm.arm.neon.vqdmlal.v4i32(<4 x i32>, <4 x i16>, <4 x i16>) nounwind readnone
239 declare <2 x i64> @llvm.arm.neon.vqdmlal.v2i64(<2 x i64>, <2 x i32>, <2 x i32>) nounwind readnone
/external/arm-neon-tests/
Dref_vqdmlal.c35 #define INSN_NAME vqdmlal
DAndroid.mk25 vqsub vqdmulh_lane vqdmull vqdmlal vqdmlsl vceq vcge vcle \
DMakefile.gcc46 vqsub vqdmulh_lane vqdmull vqdmlal vqdmlsl vceq vcge vcle \
DMakefile40 vqsub vqdmulh_lane vqdmull vqdmlal vqdmlsl vceq vcge vcle \
/external/llvm/test/CodeGen/ARM/
Dvqdmul.ll202 ;CHECK: vqdmlal.s16
213 ;CHECK: vqdmlal.s32
225 ; CHECK: vqdmlal.s16 q0, d2, d3[1]
235 ; CHECK: vqdmlal.s32 q0, d2, d3[1]
/external/clang/include/clang/Basic/
Darm_neon.td369 def OP_QDMLAL_LN : Op<(call "vqdmlal", $p0, $p1, (splat $p2, $p3))>;
370 def OP_QDMLALHi_LN : Op<(call "vqdmlal", $p0, (call "vget_high", $p1),
443 def OP_QDMLALHi : Op<(call "vqdmlal", $p0, (call "vget_high", $p1),
533 def VQDMLAL : SInst<"vqdmlal", "wwdd", "si">;
1577 def SCALAR_SQDMLAL : SInst<"vqdmlal", "rrss", "SsSi">;
/external/vixl/src/aarch32/
Dassembler-aarch32.h5150 void vqdmlal(
5152 void vqdmlal(DataType dt, QRegister rd, DRegister rn, DRegister rm) { in vqdmlal() function
5153 vqdmlal(al, dt, rd, rn, rm); in vqdmlal()
5156 void vqdmlal(Condition cond,
5162 void vqdmlal( in vqdmlal() function
5164 vqdmlal(al, dt, rd, rn, dm, index); in vqdmlal()
Ddisasm-aarch32.h2036 void vqdmlal(
2039 void vqdmlal(Condition cond,
Dassembler-aarch32.cc21361 void Assembler::vqdmlal( in vqdmlal() function in vixl::aarch32::Assembler
21386 Delegate(kVqdmlal, &Assembler::vqdmlal, cond, dt, rd, rn, rm); in vqdmlal()
21389 void Assembler::vqdmlal(Condition cond, in vqdmlal() function in vixl::aarch32::Assembler
21436 Delegate(kVqdmlal, &Assembler::vqdmlal, cond, dt, rd, rn, dm, index); in vqdmlal()
Ddisasm-aarch32.cc5763 void Disassembler::vqdmlal( in vqdmlal() function in vixl::aarch32::Disassembler
5770 void Disassembler::vqdmlal(Condition cond, in vqdmlal() function in vixl::aarch32::Disassembler
29008 vqdmlal(CurrentCond(), in DecodeT32()
29457 vqdmlal(CurrentCond(), in DecodeT32()
43165 vqdmlal(al, in DecodeA32()
43569 vqdmlal(al, in DecodeA32()
Dmacro-assembler-aarch32.h8613 vqdmlal(cond, dt, rd, rn, rm); in Vqdmlal()
8632 vqdmlal(cond, dt, rd, rn, dm, index); in Vqdmlal()
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/
Dneont2.txt618 # CHECK: vqdmlal.s16 q8, d19, d18
620 # CHECK: vqdmlal.s32 q8, d19, d18
Dneon.txt721 # CHECK: vqdmlal.s16 q8, d19, d18
723 # CHECK: vqdmlal.s32 q8, d19, d18
/external/llvm/test/MC/Disassembler/ARM/
Dneont2.txt618 # CHECK: vqdmlal.s16 q8, d19, d18
620 # CHECK: vqdmlal.s32 q8, d19, d18
Dneon.txt721 # CHECK: vqdmlal.s16 q8, d19, d18
723 # CHECK: vqdmlal.s32 q8, d19, d18
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMInstrNEON.td3562 "vqdmlal", "s", int_arm_neon_vqdmlal>;
3563 defm VQDMLALsl: N3VLInt3SL_HS<0, 0b0011, "vqdmlal", "s", int_arm_neon_vqdmlal>;
/external/llvm/lib/Target/ARM/
DARMInstrNEON.td4505 "vqdmlal", "s", null_frag>;
4506 defm VQDMLALsl: N3VLInt3SL_HS<0, 0b0011, "vqdmlal", "s", null_frag>;