1# Copyright (c) 2014 STMicroelectronics 2# Written by Christophe Lyon 3 4# Permission is hereby granted, free of charge, to any person obtaining a copy 5# of this software and associated documentation files (the "Software"), to deal 6# in the Software without restriction, including without limitation the rights 7# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 8# copies of the Software, and to permit persons to whom the Software is 9# furnished to do so, subject to the following conditions: 10 11# The above copyright notice and this permission notice shall be included in 12# all copies or substantial portions of the Software. 13 14# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 17# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 18# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 19# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 20# THE SOFTWARE. 21 22# This Makefile is aimed at helping GCC validation, for ARM and 23# AArch64 targets. 24# For example: 25# $ make -f Makefile.gcc clean 26# $ make -f Makefile.gcc CC.gccarm=/path/to/gcc check 27# Note that this will use qemu-system-arm as execution engine which 28# may not be what you want. 29# Alternatively: 30# $ make -f Makefile.gcc clean 31# $ make -f Makefile.gcc CC.gccarm=/path/to/gcc compute_ref.gccarm 32# $ /path/to/qemu -L /path/to/sysroot/lib compute_ref.gccarm 33# $ diff stm-arm-neon.gccarm ref-rvct-neon.txt 34 35CPU=cortex-a9 36 37# GCC/ARM cross compiler 38CC.gccarm := arm-none-eabi-gcc 39CFLAGS.gccarm := -g -Wall -mcpu=$(CPU) -mfloat-abi=hard -mfpu=neon -Wno-unused-variable -Wno-unused-function -ffast-math 40LD.gccarm := $(CC.gccarm) 41LDFLAGS.gccarm := $(CFLAGS.gccarm) 42 43# List of validated intrinsics 44REFNAMES = vld1 vadd vld1_lane vld1_dup vdup vget_high vget_low \ 45 vqdmlal_lane vqdmlsl_lane vext vshrn_n vset_lane vget_lane \ 46 vqsub vqdmulh_lane vqdmull vqdmlal vqdmlsl vceq vcge vcle \ 47 vcgt vclt vbsl vshl vldX vdup_lane vrshrn_n vqdmull_lane \ 48 vst1_lane vqshl vqshl_n vqrshrn_n vsub vqadd vabs vqabs \ 49 vcombine vmax vmin vneg vqneg vmlal vmlal_lane vmlsl \ 50 vmlsl_lane vmovl vmovn vmull vmull_lane vrev vrshl vshl_n \ 51 vshr_n vsra_n vtrn vuzp vzip vreinterpret vqdmulh vqrdmulh \ 52 vqrdmulh_lane vqrshl vaba vabal vabd vabdl vand vorr vorn \ 53 veor vbic vcreate vldX_lane vldX_dup vmla vmls vmul \ 54 vmul_lane vmul_n vmull_n vqdmulh_n vqdmull_n vqrdmulh_n \ 55 vmla_lane vmls_lane vmla_n vmls_n vmlal_n vmlsl_n vqdmlal_n \ 56 vqdmlsl_n vsri_n vsli_n vtst vaddhn vraddhn vaddl vaddw \ 57 vhadd vrhadd vhsub vsubl vsubw vsubhn vrsubhn vmvn vqmovn \ 58 vqmovun vrshr_n vrsra_n vshll_n vpaddl vpadd vpadal \ 59 vqshlu_n vclz vcls vcnt vqshrn_n vpmax vpmin vqshrun_n \ 60 vqrshrun_n vstX_lane vtbX vrecpe vrsqrte vcage vcagt vcale \ 61 vcalt vrecps vrsqrts vcvt 62REFLIST = $(addprefix ref_, $(REFNAMES)) 63 64REFNAMES_INT = integer dsp dspfns 65REFLIST_INT = $(addprefix ref_, $(REFNAMES_INT)) 66 67all: ref-gccarm 68 69check: check-gccarm 70 71# Building reference files with GCC/ARM. Link with GCC/ld. 72REFOBJS.gccarm = $(addsuffix .gccarm.o, $(REFLIST)) 73REFGCCARM=stm-arm-neon.gccarm 74ref-gccarm: $(REFGCCARM) 75 76check-gccarm: $(REFGCCARM) 77 diff $(REFGCCARM) ref-rvct-neon.txt 78 79SIM=qemu-system-arm 80SIMFLAGS=-cpu $(CPU) -semihosting -nographic -kernel 81$(REFGCCARM): compute_ref.gccarm 82 $(SIM) $(SIMFLAGS) $^ 83 84compute_ref.gccarm: compute_ref.gccarm.o $(REFOBJS.gccarm) 85 $(LD.gccarm) $(LDFLAGS.gccarm) $^ -o $@ 86 87compute_ref.gccarm.o: %.gccarm.o: %.c 88 $(CC.gccarm) $(CFLAGS.gccarm) -c $^ -o $@ -DREFFILE=\"$(REFGCCARM)\" -DGCCTESTS_FILE=\"expected_input4gcc.txt\" 89 90ref_%.gccarm.o: ref_%.c stm-arm-neon-ref.h 91 $(CC.gccarm) $(CFLAGS.gccarm) -c $< -o $@ 92 93# Use '*' rather than '%' in these rules: 94# - using '%' does not make them add to the implicit rules above (they 95# are different rules, only the 1st one matches) 96# - they are needed only when the target already exists, so the 97# wildcard matches when needed. 98# - if the target does not already exist, the implicit rules apply. 99ref_vadd.*.o ref_vsub.*.o ref_vand.*.o ref_vbic.*.o ref_veor.*.o ref_vorn.*.o ref_vorr.*.o: ref_v_binary_op.c 100ref_vqadd.*.o ref_vqsub.*.o: ref_v_binary_sat_op.c 101ref_vabs.*.o ref_vneg.*.o ref_vmvn.*.o: ref_v_unary_op.c 102ref_vqabs.*.o ref_vqneg.*.o: ref_v_unary_sat_op.c 103ref_vceq.*.o ref_vcge.*.o ref_vcle.*.o ref_vcgt.*.o ref_vclt.*.o: ref_v_comp_op.c 104ref_vhadd.*.o ref_vrhadd.*.o ref_vhsub.*.o ref_vmin.*.o: ref_vmax.c 105ref_vmls.*.o: ref_vmla.c 106ref_vmls_lane.*.o: ref_vmla_lane.c 107ref_vmls_n.*.o: ref_vmla_n.c 108ref_vmlsl.*.o: ref_vmlal.c 109ref_vmlsl_lane.*.o: ref_vmlal_lane.c 110ref_vmlsl_n.*.o: ref_vmlal_n.c 111ref_vqdmlsl.*.o: ref_vqdmlal.c 112ref_vqdmlsl_lane.*.o: ref_vqdmlal_lane.c 113ref_vqdmlsl_n.*.o: ref_vqdmlal_n.c 114ref_vtrn.*.o ref_vzip.*.o: ref_vuzp.c 115ref_vsli_n.*.o ref_vsri_n.*.o: ref_vsXi_n.c 116ref_vsli_n.*.o: ref_vsli_n.c 117ref_vsri_n.*.o: ref_vsri_n.c 118ref_vraddhn.*.o ref_vsubhn.*.o ref_vrsubhn.*.o: ref_vaddhn.c 119ref_vsubl.*.o: ref_vaddl.c 120ref_vsubw.*.o: ref_vaddw.c 121ref_vcage.*.o ref_vcale.*.o ref_vcagt.*.o ref_vcalt.*.o: ref_v_comp_f_op.c 122 123clean: 124 rm -f *.o *.log 125