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Searched refs:vrshl (Results 1 – 24 of 24) sorted by relevance

/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dneont2-shift-encoding.s93 @ CHECK: vrshl.s8 d16, d17, d16 @ encoding: [0x40,0xef,0xa1,0x05]
94 vrshl.s8 d16, d17, d16
95 @ CHECK: vrshl.s16 d16, d17, d16 @ encoding: [0x50,0xef,0xa1,0x05]
96 vrshl.s16 d16, d17, d16
97 @ CHECK: vrshl.s32 d16, d17, d16 @ encoding: [0x60,0xef,0xa1,0x05]
98 vrshl.s32 d16, d17, d16
99 @ CHECK: vrshl.s64 d16, d17, d16 @ encoding: [0x70,0xef,0xa1,0x05]
100 vrshl.s64 d16, d17, d16
101 @ CHECK: vrshl.u8 d16, d17, d16 @ encoding: [0x40,0xff,0xa1,0x05]
102 vrshl.u8 d16, d17, d16
[all …]
Dneon-shift-encoding.s156 @ CHECK: vrshl.s8 d16, d17, d16 @ encoding: [0xa1,0x05,0x40,0xf2]
157 vrshl.s8 d16, d17, d16
158 @ CHECK: vrshl.s16 d16, d17, d16 @ encoding: [0xa1,0x05,0x50,0xf2]
159 vrshl.s16 d16, d17, d16
160 @ CHECK: vrshl.s32 d16, d17, d16 @ encoding: [0xa1,0x05,0x60,0xf2]
161 vrshl.s32 d16, d17, d16
162 @ CHECK: vrshl.s64 d16, d17, d16 @ encoding: [0xa1,0x05,0x70,0xf2]
163 vrshl.s64 d16, d17, d16
164 @ CHECK: vrshl.u8 d16, d17, d16 @ encoding: [0xa1,0x05,0x40,0xf3]
165 vrshl.u8 d16, d17, d16
[all …]
/external/llvm/test/MC/ARM/
Dneont2-shift-encoding.s93 @ CHECK: vrshl.s8 d16, d17, d16 @ encoding: [0x40,0xef,0xa1,0x05]
94 vrshl.s8 d16, d17, d16
95 @ CHECK: vrshl.s16 d16, d17, d16 @ encoding: [0x50,0xef,0xa1,0x05]
96 vrshl.s16 d16, d17, d16
97 @ CHECK: vrshl.s32 d16, d17, d16 @ encoding: [0x60,0xef,0xa1,0x05]
98 vrshl.s32 d16, d17, d16
99 @ CHECK: vrshl.s64 d16, d17, d16 @ encoding: [0x70,0xef,0xa1,0x05]
100 vrshl.s64 d16, d17, d16
101 @ CHECK: vrshl.u8 d16, d17, d16 @ encoding: [0x40,0xff,0xa1,0x05]
102 vrshl.u8 d16, d17, d16
[all …]
Dneon-shift-encoding.s281 vrshl.s8 d16, d17, d16
282 vrshl.s16 d16, d17, d16
283 vrshl.s32 d16, d17, d16
284 vrshl.s64 d16, d17, d16
285 vrshl.u8 d16, d17, d16
286 vrshl.u16 d16, d17, d16
287 vrshl.u32 d16, d17, d16
288 vrshl.u64 d16, d17, d16
289 vrshl.s8 q8, q9, q8
290 vrshl.s16 q8, q9, q8
[all …]
/external/libavc/common/arm/
Dih264_weighted_pred_a9q.s148 vrshl.s16 q2, q2, q0 @rounds off the weighted samples from rows 1,2
149 vrshl.s16 q3, q3, q0 @rounds off the weighted samples from rows 3,4
182 vrshl.s16 q2, q2, q0 @rounds off the weighted samples from row 1
183 vrshl.s16 q3, q3, q0 @rounds off the weighted samples from row 2
184 vrshl.s16 q4, q4, q0 @rounds off the weighted samples from row 3
186 vrshl.s16 q5, q5, q0 @rounds off the weighted samples from row 4
229 vrshl.s16 q6, q6, q0 @rounds off the weighted samples from row 1L
232 vrshl.s16 q7, q7, q0 @rounds off the weighted samples from row 1H
233 vrshl.s16 q8, q8, q0 @rounds off the weighted samples from row 2L
235 vrshl.s16 q9, q9, q0 @rounds off the weighted samples from row 2H
[all …]
Dih264_weighted_bi_pred_a9q.s190 vrshl.s16 q2, q2, q0 @rounds off the weighted samples from rows 1,2
191 vrshl.s16 q4, q4, q0 @rounds off the weighted samples from rows 3,4
238 vrshl.s16 q2, q2, q0 @rounds off the weighted samples from row 1
239 vrshl.s16 q4, q4, q0 @rounds off the weighted samples from row 2
240 vrshl.s16 q6, q6, q0 @rounds off the weighted samples from row 3
242 vrshl.s16 q8, q8, q0 @rounds off the weighted samples from row 4
311 vrshl.s16 q10, q10, q0 @rounds off the weighted samples from row 1L
315 vrshl.s16 q2, q2, q0 @rounds off the weighted samples from row 1H
317 vrshl.s16 q12, q12, q0 @rounds off the weighted samples from row 2L
319 vrshl.s16 q4, q4, q0 @rounds off the weighted samples from row 2H
[all …]
/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/
Dvshl.ll366 ;CHECK: vrshl.s8
375 ;CHECK: vrshl.s16
384 ;CHECK: vrshl.s32
393 ;CHECK: vrshl.s64
402 ;CHECK: vrshl.u8
411 ;CHECK: vrshl.u16
420 ;CHECK: vrshl.u32
429 ;CHECK: vrshl.u64
438 ;CHECK: vrshl.s8
447 ;CHECK: vrshl.s16
[all …]
/external/llvm/test/CodeGen/ARM/
Dvshl.ll366 ;CHECK: vrshl.s8
375 ;CHECK: vrshl.s16
384 ;CHECK: vrshl.s32
393 ;CHECK: vrshl.s64
402 ;CHECK: vrshl.u8
411 ;CHECK: vrshl.u16
420 ;CHECK: vrshl.u32
429 ;CHECK: vrshl.u64
438 ;CHECK: vrshl.s8
447 ;CHECK: vrshl.s16
[all …]
/external/arm-neon-tests/
DAndroid.mk29 vmlsl_lane vmovl vmovn vmull vmull_lane vrev vrshl vshl_n \
DMakefile.gcc50 vmlsl_lane vmovl vmovn vmull vmull_lane vrev vrshl vshl_n \
DMakefile44 vmlsl_lane vmovl vmovn vmull vmull_lane vrev vrshl vshl_n \
Dref_vrshl.c40 vrshl##Q##_##T2##W(VECT_VAR(vector, T1, W, N), \ in exec_vrshl()
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/
Dneont2.txt1108 # CHECK: vrshl.s8 d16, d17, d16
1110 # CHECK: vrshl.s16 d16, d17, d16
1112 # CHECK: vrshl.s32 d16, d17, d16
1114 # CHECK: vrshl.s64 d16, d17, d16
1116 # CHECK: vrshl.u8 d16, d17, d16
1118 # CHECK: vrshl.u16 d16, d17, d16
1120 # CHECK: vrshl.u32 d16, d17, d16
1122 # CHECK: vrshl.u64 d16, d17, d16
1124 # CHECK: vrshl.s8 q8, q9, q8
1126 # CHECK: vrshl.s16 q8, q9, q8
[all …]
Dneon.txt1285 # CHECK: vrshl.s8 d16, d17, d16
1287 # CHECK: vrshl.s16 d16, d17, d16
1289 # CHECK: vrshl.s32 d16, d17, d16
1291 # CHECK: vrshl.s64 d16, d17, d16
1293 # CHECK: vrshl.u8 d16, d17, d16
1295 # CHECK: vrshl.u16 d16, d17, d16
1297 # CHECK: vrshl.u32 d16, d17, d16
1299 # CHECK: vrshl.u64 d16, d17, d16
1301 # CHECK: vrshl.s8 q8, q9, q8
1303 # CHECK: vrshl.s16 q8, q9, q8
[all …]
/external/llvm/test/MC/Disassembler/ARM/
Dneont2.txt1108 # CHECK: vrshl.s8 d16, d17, d16
1110 # CHECK: vrshl.s16 d16, d17, d16
1112 # CHECK: vrshl.s32 d16, d17, d16
1114 # CHECK: vrshl.s64 d16, d17, d16
1116 # CHECK: vrshl.u8 d16, d17, d16
1118 # CHECK: vrshl.u16 d16, d17, d16
1120 # CHECK: vrshl.u32 d16, d17, d16
1122 # CHECK: vrshl.u64 d16, d17, d16
1124 # CHECK: vrshl.s8 q8, q9, q8
1126 # CHECK: vrshl.s16 q8, q9, q8
[all …]
Dneon.txt1285 # CHECK: vrshl.s8 d16, d17, d16
1287 # CHECK: vrshl.s16 d16, d17, d16
1289 # CHECK: vrshl.s32 d16, d17, d16
1291 # CHECK: vrshl.s64 d16, d17, d16
1293 # CHECK: vrshl.u8 d16, d17, d16
1295 # CHECK: vrshl.u16 d16, d17, d16
1297 # CHECK: vrshl.u32 d16, d17, d16
1299 # CHECK: vrshl.u64 d16, d17, d16
1301 # CHECK: vrshl.s8 q8, q9, q8
1303 # CHECK: vrshl.s16 q8, q9, q8
[all …]
/external/vixl/src/aarch32/
Dassembler-aarch32.h5523 void vrshl(
5525 void vrshl(DataType dt, DRegister rd, DRegister rm, DRegister rn) { in vrshl() function
5526 vrshl(al, dt, rd, rm, rn); in vrshl()
5529 void vrshl(
5531 void vrshl(DataType dt, QRegister rd, QRegister rm, QRegister rn) { in vrshl() function
5532 vrshl(al, dt, rd, rm, rn); in vrshl()
Ddisasm-aarch32.h2246 void vrshl(
2249 void vrshl(
Dassembler-aarch32.cc23401 void Assembler::vrshl( in vrshl() function in vixl::aarch32::Assembler
23428 Delegate(kVrshl, &Assembler::vrshl, cond, dt, rd, rm, rn); in vrshl()
23431 void Assembler::vrshl( in vrshl() function in vixl::aarch32::Assembler
23458 Delegate(kVrshl, &Assembler::vrshl, cond, dt, rd, rm, rn); in vrshl()
Ddisasm-aarch32.cc6354 void Disassembler::vrshl( in vrshl() function in vixl::aarch32::Disassembler
6365 void Disassembler::vrshl( in vrshl() function in vixl::aarch32::Disassembler
25520 vrshl(CurrentCond(), in DecodeT32()
25551 vrshl(CurrentCond(), in DecodeT32()
38916 vrshl(al, dt, DRegister(rd), DRegister(rm), DRegister(rn)); in DecodeA32()
38943 vrshl(al, dt, QRegister(rd), QRegister(rm), QRegister(rn)); in DecodeA32()
Dmacro-assembler-aarch32.h9507 vrshl(cond, dt, rd, rm, rn); in Vrshl()
9522 vrshl(cond, dt, rd, rm, rn); in Vrshl()
/external/clang/include/clang/Basic/
Darm_neon.td600 def VRSHL : SInst<"vrshl", "ddx", "csilUcUsUiUlQcQsQiQlQUcQUsQUiQUl">;
1366 def SCALAR_RSHL: SInst<"vrshl", "sss", "SlSUl">;
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMInstrNEON.td4152 "vrshl", "s", int_arm_neon_vrshifts>;
4155 "vrshl", "u", int_arm_neon_vrshiftu>;
/external/llvm/lib/Target/ARM/
DARMInstrNEON.td5480 "vrshl", "s", int_arm_neon_vrshifts>;
5483 "vrshl", "u", int_arm_neon_vrshiftu>;