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Searched refs:vuzp (Results 1 – 25 of 37) sorted by relevance

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/external/llvm/test/MC/ARM/
Dneont2-shuffle-encoding.s29 @ CHECK: vuzp.8 d17, d16 @ encoding: [0xf2,0xff,0x20,0x11]
30 vuzp.8 d17, d16
31 @ CHECK: vuzp.16 d17, d16 @ encoding: [0xf6,0xff,0x20,0x11]
32 vuzp.16 d17, d16
33 @ CHECK: vuzp.8 q9, q8 @ encoding: [0xf2,0xff,0x60,0x21]
34 vuzp.8 q9, q8
35 @ CHECK: vuzp.16 q9, q8 @ encoding: [0xf6,0xff,0x60,0x21]
36 vuzp.16 q9, q8
37 @ CHECK: vuzp.32 q9, q8 @ encoding: [0xfa,0xff,0x60,0x21]
38 vuzp.32 q9, q8
Dneont2-sub-encoding.s27 @ CHECK: vuzp.8 d17, d16 @ encoding: [0xf2,0xff,0x20,0x11]
28 vuzp.8 d17, d16
29 @ CHECK: vuzp.16 d17, d16 @ encoding: [0xf6,0xff,0x20,0x11]
30 vuzp.16 d17, d16
31 @ CHECK: vuzp.8 q9, q8 @ encoding: [0xf2,0xff,0x60,0x21]
32 vuzp.8 q9, q8
33 @ CHECK: vuzp.16 q9, q8 @ encoding: [0xf6,0xff,0x60,0x21]
34 vuzp.16 q9, q8
35 @ CHECK: vuzp.32 q9, q8 @ encoding: [0xfa,0xff,0x60,0x21]
36 vuzp.32 q9, q8
Dneon-shuffle-encoding.s52 vuzp.8 d17, d16
53 vuzp.16 d17, d16
54 vuzp.8 q9, q8
55 vuzp.16 q9, q8
56 vuzp.32 q9, q8
63 vuzp.32 d2, d3
65 @ CHECK: vuzp.8 d17, d16 @ encoding: [0x20,0x11,0xf2,0xf3]
66 @ CHECK: vuzp.16 d17, d16 @ encoding: [0x20,0x11,0xf6,0xf3]
67 @ CHECK: vuzp.8 q9, q8 @ encoding: [0x60,0x21,0xf2,0xf3]
68 @ CHECK: vuzp.16 q9, q8 @ encoding: [0x60,0x21,0xf6,0xf3]
[all …]
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dneont2-shuffle-encoding.s29 @ CHECK: vuzp.8 d17, d16 @ encoding: [0xf2,0xff,0x20,0x11]
30 vuzp.8 d17, d16
31 @ CHECK: vuzp.16 d17, d16 @ encoding: [0xf6,0xff,0x20,0x11]
32 vuzp.16 d17, d16
33 @ CHECK: vuzp.8 q9, q8 @ encoding: [0xf2,0xff,0x60,0x21]
34 vuzp.8 q9, q8
35 @ CHECK: vuzp.16 q9, q8 @ encoding: [0xf6,0xff,0x60,0x21]
36 vuzp.16 q9, q8
37 @ CHECK: vuzp.32 q9, q8 @ encoding: [0xfa,0xff,0x60,0x21]
38 vuzp.32 q9, q8
Dneont2-sub-encoding.s27 @ CHECK: vuzp.8 d17, d16 @ encoding: [0xf2,0xff,0x20,0x11]
28 vuzp.8 d17, d16
29 @ CHECK: vuzp.16 d17, d16 @ encoding: [0xf6,0xff,0x20,0x11]
30 vuzp.16 d17, d16
31 @ CHECK: vuzp.8 q9, q8 @ encoding: [0xf2,0xff,0x60,0x21]
32 vuzp.8 q9, q8
33 @ CHECK: vuzp.16 q9, q8 @ encoding: [0xf6,0xff,0x60,0x21]
34 vuzp.16 q9, q8
35 @ CHECK: vuzp.32 q9, q8 @ encoding: [0xfa,0xff,0x60,0x21]
36 vuzp.32 q9, q8
Dneon-shuffle-encoding.s27 @ CHECK: vuzp.8 d17, d16 @ encoding: [0x20,0x11,0xf2,0xf3]
28 vuzp.8 d17, d16
29 @ CHECK: vuzp.16 d17, d16 @ encoding: [0x20,0x11,0xf6,0xf3]
30 vuzp.16 d17, d16
31 @ CHECK: vuzp.8 q9, q8 @ encoding: [0x60,0x21,0xf2,0xf3]
32 vuzp.8 q9, q8
33 @ CHECK: vuzp.16 q9, q8 @ encoding: [0x60,0x21,0xf6,0xf3]
34 vuzp.16 q9, q8
35 @ CHECK: vuzp.32 q9, q8 @ encoding: [0x60,0x21,0xfa,0xf3]
36 vuzp.32 q9, q8
/external/llvm/test/CodeGen/ARM/
Dvuzp.ll8 ; CHECK-NEXT: vuzp.8 d17, d16
25 ; CHECK-NEXT: vuzp.8 [[LDR0]], [[LDR1]]
40 ; CHECK-NEXT: vuzp.16 d17, d16
57 ; CHECK-NEXT: vuzp.16 [[LDR0]], [[LDR1]]
74 ; CHECK-NEXT: vuzp.8 q9, q8
92 ; CHECK-NEXT: vuzp.8 q9, q8
107 ; CHECK-NEXT: vuzp.16 q9, q8
125 ; CHECK-NEXT: vuzp.16 q9, q8
140 ; CHECK-NEXT: vuzp.32 q9, q8
158 ; CHECK-NEXT: vuzp.32 q9, q8
[all …]
Dbig-endian-neon-trunc-store.ll7 ; CHECK: vuzp.16 [[REG]], [[REG2:d[0-9]+]]
19 ; CHECK: vuzp.8 [[REG]], [[REG2:d[0-9]+]]
Dpopcnt.ll25 ; CHECK: vuzp.8 {{d[0-9]+}}, {{d[0-9]+}}
37 ; CHECK: vuzp.8 {{q[0-9]+}}, {{q[0-9]+}}
49 ; CHECK: vuzp.8 {{d[0-9]+}}, {{d[0-9]+}}
52 ; CHECK: vuzp.16 {{d[0-9]+}}, {{d[0-9]+}}
64 ; CHECK: vuzp.8 {{q[0-9]+}}, {{q[0-9]+}}
67 ; CHECK: vuzp.16 {{q[0-9]+}}, {{q[0-9]+}}
Dvector-store.ll233 ;CHECK: vuzp.8 [[VECLO]], {{d[0-9]+}}
248 ;CHECK: vuzp.8 [[VECLO]], {{d[0-9]+}}
Dbig-endian-neon-extend.ll69 ; CHECK-NEXT: vuzp.16 [[REG]], {{d[0-9]+}}
Darm-interleaved-accesses.ll273 ; NEON-NEXT: vuzp.32 q8, {{.*}}
295 ; NEON-NEXT: vuzp.32 q8, {{.*}}
Dvzip.ll291 ; CHECK-NOT: vuzp
/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/
Dvuzp.ll5 ;CHECK: vuzp.8
17 ;CHECK: vuzp.16
31 ;CHECK: vuzp.8
43 ;CHECK: vuzp.16
55 ;CHECK: vuzp.32
67 ;CHECK: vuzp.32
81 ;CHECK: vuzp.8
93 ;CHECK: vuzp.16
/external/arm-neon-tests/
DAndroid.mk30 vshr_n vsra_n vtrn vuzp vzip vreinterpret vqdmulh vqrdmulh \
DMakefile.gcc51 vshr_n vsra_n vtrn vuzp vzip vreinterpret vqdmulh vqrdmulh \
DMakefile45 vshr_n vsra_n vtrn vuzp vzip vreinterpret vqdmulh vqrdmulh \
Dref_vuzp.c35 #define INSN_NAME vuzp
/external/llvm/test/CodeGen/AArch64/
Dneon-perm.ll2483 …%vuzp.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i3…
2485 %.fca.0.0.insert = insertvalue %struct.int8x8x2_t undef, <8 x i8> %vuzp.i, 0, 0
2495 %vuzp.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
2497 %.fca.0.0.insert = insertvalue %struct.int16x4x2_t undef, <4 x i16> %vuzp.i, 0, 0
2507 %vuzp.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
2509 %.fca.0.0.insert = insertvalue %struct.int32x2x2_t undef, <2 x i32> %vuzp.i, 0, 0
2519 …%vuzp.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i3…
2521 %.fca.0.0.insert = insertvalue %struct.uint8x8x2_t undef, <8 x i8> %vuzp.i, 0, 0
2531 %vuzp.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
2533 %.fca.0.0.insert = insertvalue %struct.uint16x4x2_t undef, <4 x i16> %vuzp.i, 0, 0
[all …]
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/
Dneont2.txt1298 # CHECK: vuzp.8 d17, d16
1300 # CHECK: vuzp.16 d17, d16
1302 # CHECK: vuzp.8 q9, q8
1304 # CHECK: vuzp.16 q9, q8
1306 # CHECK: vuzp.32 q9, q8
1344 # CHECK: vuzp.8 d17, d16
1346 # CHECK: vuzp.16 d17, d16
1348 # CHECK: vuzp.8 q9, q8
1350 # CHECK: vuzp.16 q9, q8
1352 # CHECK: vuzp.32 q9, q8
Dneon.txt1491 # CHECK: vuzp.8 d17, d16
1493 # CHECK: vuzp.16 d17, d16
1495 # CHECK: vuzp.8 q9, q8
1497 # CHECK: vuzp.16 q9, q8
1499 # CHECK: vuzp.32 q9, q8
/external/llvm/test/MC/Disassembler/ARM/
Dneont2.txt1298 # CHECK: vuzp.8 d17, d16
1300 # CHECK: vuzp.16 d17, d16
1302 # CHECK: vuzp.8 q9, q8
1304 # CHECK: vuzp.16 q9, q8
1306 # CHECK: vuzp.32 q9, q8
1344 # CHECK: vuzp.8 d17, d16
1346 # CHECK: vuzp.16 d17, d16
1348 # CHECK: vuzp.8 q9, q8
1350 # CHECK: vuzp.16 q9, q8
1352 # CHECK: vuzp.32 q9, q8
Dneon.txt1491 # CHECK: vuzp.8 d17, d16
1493 # CHECK: vuzp.16 d17, d16
1495 # CHECK: vuzp.8 q9, q8
1497 # CHECK: vuzp.16 q9, q8
1499 # CHECK: vuzp.32 q9, q8
/external/libavc/encoder/arm/
Dih264e_evaluate_intra_chroma_modes_a9q.s102 vuzp.u8 q4, q5 @
/external/libavc/common/arm/
Dih264_intra_pred_chroma_a9q.s408 vuzp.16 q7, q8

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