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Searched refs:vvvv (Results 1 – 19 of 19) sorted by relevance

/external/v8/src/x64/
Ddisasm-x64.cc885 int mod, regop, rm, vvvv = vex_vreg(); in AVXInstruction() local
890 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv)); in AVXInstruction()
895 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv)); in AVXInstruction()
900 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv)); in AVXInstruction()
905 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv)); in AVXInstruction()
910 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv)); in AVXInstruction()
915 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv)); in AVXInstruction()
920 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv)); in AVXInstruction()
925 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv)); in AVXInstruction()
930 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv)); in AVXInstruction()
[all …]
/external/v8/src/ia32/
Ddisasm-ia32.cc736 int mod, regop, rm, vvvv = vex_vreg(); in AVXInstruction() local
741 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv)); in AVXInstruction()
746 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv)); in AVXInstruction()
751 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv)); in AVXInstruction()
756 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv)); in AVXInstruction()
761 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv)); in AVXInstruction()
766 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv)); in AVXInstruction()
771 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv)); in AVXInstruction()
776 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv)); in AVXInstruction()
781 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv)); in AVXInstruction()
[all …]
/external/swiftshader/src/Shader/
DSamplerCore.cpp76 Float4 vvvv = v; in sampleTexture() local
103 cubeFace(face, uuuu, vvvv, lodX, lodY, lodZ, u, v, w); in sampleTexture()
116 computeLod(texture, lod, anisotropy, uDelta, vDelta, uuuu, vvvv, lodBias, dsx, dsy, function); in sampleTexture()
125 computeLod3D(texture, lod, uuuu, vvvv, wwww, lodBias, dsx, dsy, function); in sampleTexture()
130 …sampleFilter(texture, c, uuuu, vvvv, wwww, offset, lod, anisotropy, uDelta, vDelta, face, function… in sampleTexture()
136 …sampleFloatFilter(texture, cf, uuuu, vvvv, wwww, offset, lod, anisotropy, uDelta, vDelta, face, fu… in sampleTexture()
325 Float4 vvvv = v; in sampleTexture() local
335 cubeFace(face, uuuu, vvvv, lodX, lodY, lodZ, u, v, w); in sampleTexture()
348 computeLod(texture, lod, anisotropy, uDelta, vDelta, uuuu, vvvv, lodBias, dsx, dsy, function); in sampleTexture()
357 computeLod3D(texture, lod, uuuu, vvvv, wwww, lodBias, dsx, dsy, function); in sampleTexture()
[all …]
DSamplerCore.hpp78 …void computeIndices(UInt index[4], Short4 uuuu, Short4 vvvv, Short4 wwww, Vector4f &offset, const …
79 …void computeIndices(UInt index[4], Int4& uuuu, Int4& vvvv, Int4& wwww, const Pointer<Byte> &mipmap…
/external/llvm/lib/Target/X86/Disassembler/
DX86DisassemblerDecoder.cpp1549 insn->vvvv = (Reg)fixupRegValue(insn, in fixupReg()
1551 insn->vvvv, in fixupReg()
1694 int vvvv; in readVVVV() local
1696 vvvv = (v2FromEVEX4of4(insn->vectorExtensionPrefix[3]) << 4 | in readVVVV()
1699 vvvv = vvvvFromVEX3of3(insn->vectorExtensionPrefix[2]); in readVVVV()
1701 vvvv = vvvvFromVEX2of2(insn->vectorExtensionPrefix[1]); in readVVVV()
1703 vvvv = vvvvFromXOP3of3(insn->vectorExtensionPrefix[2]); in readVVVV()
1708 vvvv &= 0x7; in readVVVV()
1710 insn->vvvv = static_cast<Reg>(vvvv); in readVVVV()
1748 needVVVV = hasVVVV && (insn->vvvv != 0); in readOperands()
DX86DisassemblerDecoder.h598 Reg vvvv; member
DX86Disassembler.cpp1013 translateRegister(mcInst, insn.vvvv); in translateOperand()
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/X86/
Dinvalid-VEX-vvvv.txt3 # This instruction would decode as movmskps if the vvvv field in the VEX prefix was all 1s.
/external/llvm/test/MC/Disassembler/X86/
Dinvalid-VEX-vvvv.txt3 # This instruction would decode as movmskps if the vvvv field in the VEX prefix was all 1s.
/external/swiftshader/third_party/LLVM/lib/Target/X86/Disassembler/
DX86DisassemblerDecoder.c1269 insn->vvvv = (Reg)fixupRegValue(insn, in fixupReg()
1271 insn->vvvv, in fixupReg()
1450 insn->vvvv = vvvvFromVEX3of3(insn->vexPrefix[2]); in readVVVV()
1452 insn->vvvv = vvvvFromVEX2of2(insn->vexPrefix[1]); in readVVVV()
1457 insn->vvvv &= 0x7; in readVVVV()
1478 needVVVV = hasVVVV && (insn->vvvv != 0); in readOperands()
DX86DisassemblerDecoder.h490 Reg vvvv; member
DX86Disassembler.cpp554 translateRegister(mcInst, insn.vvvv); in translateOperand()
/external/icu/icu4c/source/data/locales/
Des_AR.txt39 Hmsvvvv{"HH:mm:ss (vvvv)"}
Des.txt462 Hmsvvvv{"H:mm:ss (vvvv)"}
483 hmsvvvv{"h:mm:ss a (vvvv)"}
/external/tcpdump/tests/
DTESTLIST196 of10_s4810-vvvv of10_s4810.pcap of10_s4810-vvvv.out -t -vvvv
/external/bzip2/
Dbzip2.txt326 was more like 100:1. You can use the -vvvv option to mon-
Dbzip2.1.preformatted329 was more like 100:1. You can use the −vvvv option to mon­
/external/python/cpython2/Doc/howto/
Dargparse.rst546 $ python prog.py 4 -vvvv
/external/valgrind/VEX/priv/
Dguest_amd64_toIR.c30261 UInt vvvv = getVexNvvvv(pfx); in decode_vregW() local
30267 assign( swap ? v[1] : v[2], getXMMReg(vvvv) ); in decode_vregW()
30268 DIP( "%s,%s,%s", nameXMMReg(*dst), nameXMMReg(vvvv), dis_buf ); in decode_vregW()
30272 assign( v[1], getXMMReg(vvvv) ); in decode_vregW()
30275 DIP( "%s,%s,%s,%s", nameXMMReg(*dst), nameXMMReg(vvvv), in decode_vregW()