| /art/compiler/optimizing/ |
| D | intrinsics_mips.cc | 544 __ Subu(out, TMP, out); in GenNumberOfTrailingZeroes() local
648 __ Subu(TMP, in, TMP); in GenBitCount() local
680 __ Subu(tmp_lo, in_lo, tmp_lo); in GenBitCount() local
683 __ Subu(tmp_hi, in_hi, tmp_hi); in GenBitCount() local
833 __ Subu(out_lo, TMP, AT); in GenAbsInteger() local
842 __ Subu(out, out, AT); in GenAbsInteger() local
1981 __ Subu(out, out, expected); // If we didn't get the 'expected' in GenCas() local
2505 __ Subu(TMP, ZERO, in_lo); in GenLowestOneBit() local
2507 __ Subu(TMP, ZERO, in_hi); in GenLowestOneBit() local
2518 __ Subu(TMP, ZERO, in); in GenLowestOneBit() local
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| D | code_generator_mips.cc | 2096 __ Subu(dst, lhs, rhs_reg); in HandleBinaryOp() local
2135 __ Subu(dst_low, lhs_low, rhs_low); in HandleBinaryOp() local
2136 __ Subu(dst_high, lhs_high, rhs_high); in HandleBinaryOp() local
2137 __ Subu(dst_high, dst_high, TMP); in HandleBinaryOp() local
2342 __ Subu(TMP, ZERO, rhs_reg); in HandleShift() local
3400 __ Subu(res, res, TMP); in VisitCompare() local
3412 __ Subu(res, AT, TMP); // Result -1:1:0 for [ <, >, == ]. in VisitCompare() local
3416 __ Subu(res, AT, TMP); // Result -1:1:0 for [ <, >, == ]. in VisitCompare() local
3569 __ Subu(out, ZERO, dividend); in DivRemOneOrMinusOne() local
3601 __ Subu(out, ZERO, out); in DivRemByPowerOfTwo() local
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| D | code_generator_mips64.cc | 1930 __ Subu(dst, lhs, rhs_reg); in HandleBinaryOp() local
2985 __ Subu(res, res, TMP); in VisitCompare() local
3098 __ Subu(out, ZERO, dividend); in DivRemOneOrMinusOne() local
3135 __ Subu(out, ZERO, out); in DivRemByPowerOfTwo() local
3165 __ Subu(out, dividend, TMP); in DivRemByPowerOfTwo() local
3178 __ Subu(out, out, TMP); in DivRemByPowerOfTwo() local
3241 __ Subu(TMP, TMP, dividend); in GenerateDivRemWithAnyConstant() local
3250 __ Subu(out, TMP, out); in GenerateDivRemWithAnyConstant() local
3253 __ Subu(AT, TMP, AT); in GenerateDivRemWithAnyConstant() local
3256 __ Subu(out, dividend, TMP); in GenerateDivRemWithAnyConstant() local
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| D | intrinsics_mips64.cc | 424 __ Subu(TMP, in, TMP); in GenBitCount() local
523 __ Subu(out, out, AT); in GenAbsInteger() local
954 __ Subu(out, out, TMP); in GenRound() local
2156 __ Subu(AT, AT, pos_reg); in CheckPosition() local
2305 __ Subu(TMP, ZERO, in); in GenLowestOneBit() local
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| /art/compiler/utils/mips/ |
| D | assembler_mips_test.cc | 266 TEST_F(AssemblerMIPSTest, Subu) { in TEST_F() argument
2504 __ Subu(mips::T0, mips::T1, mips::AT); in TEST_F() local
2650 __ Subu(mips::T2, mips::T1, mips::T0); in TEST_F() local
2784 __ Subu(mips::T0, mips::T1, mips::T2); in TEST_F() local
2837 __ Subu(mips::T0, mips::T1, mips::T2); in TEST_F() local
2848 __ Subu(mips::T0, mips::T1, mips::T2); in TEST_F() local
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| D | assembler_mips32r6_test.cc | 1118 __ Subu(mips::T0, mips::T1, mips::T2); in TEST_F() local
1129 __ Subu(mips::T0, mips::T1, mips::T2); in TEST_F() local
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| D | assembler_mips.cc | 538 void MipsAssembler::Subu(Register rd, Register rs, Register rt) { in Subu() function in art::mips::MipsAssembler
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| /art/compiler/utils/mips64/ |
| D | assembler_mips64_test.cc | 1211 TEST_F(AssemblerMIPS64Test, Subu) { in TEST_F() argument
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| D | assembler_mips64.cc | 319 void Mips64Assembler::Subu(GpuRegister rd, GpuRegister rs, GpuRegister rt) { in Subu() function in art::mips64::Mips64Assembler
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