Searched refs:FCSR (Results 1 – 12 of 12) sorted by relevance
| /external/v8/src/compiler/mips64/ |
| D | code-generator-mips64.cc | 495 __ cfc1(kScratchReg, FCSR); \
497 __ ctc1(at, FCSR); \
499 __ ctc1(kScratchReg, FCSR); \
519 __ cfc1(kScratchReg, FCSR); \
521 __ ctc1(at, FCSR); \
523 __ ctc1(kScratchReg, FCSR); \
1608 __ cfc1(tmp_fcsr, FCSR); in AssembleArchInstruction()
1610 __ ctc1(zero_reg, FCSR); in AssembleArchInstruction()
1616 __ cfc1(result, FCSR); in AssembleArchInstruction()
1624 __ ctc1(tmp_fcsr, FCSR); in AssembleArchInstruction()
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| /external/v8/src/compiler/mips/ |
| D | code-generator-mips.cc | 456 __ cfc1(kScratchReg, FCSR); \
458 __ ctc1(at, FCSR); \
460 __ ctc1(kScratchReg, FCSR); \
482 __ cfc1(kScratchReg, FCSR); \
484 __ ctc1(at, FCSR); \
486 __ ctc1(kScratchReg, FCSR); \
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| /external/v8/src/mips/ |
| D | macro-assembler-mips.cc | 2331 cfc1(scratch, FCSR); in Movt()
2357 cfc1(scratch, FCSR); in Movf()
2423 cfc1(scratch, FCSR); in EmitFPUTruncate()
2425 ctc1(zero_reg, FCSR); in EmitFPUTruncate()
2444 cfc1(except_flag, FCSR); in EmitFPUTruncate()
2446 ctc1(scratch, FCSR); in EmitFPUTruncate()
2465 cfc1(scratch2, FCSR); in TryInlineTruncateDoubleToI()
2466 ctc1(zero_reg, FCSR); in TryInlineTruncateDoubleToI()
2471 cfc1(scratch, FCSR); in TryInlineTruncateDoubleToI()
2472 ctc1(scratch2, FCSR); in TryInlineTruncateDoubleToI()
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| D | code-stubs-mips.cc | 99 __ cfc1(scratch2, FCSR); in Generate()
100 __ ctc1(zero_reg, FCSR); in Generate()
108 __ cfc1(scratch, FCSR); in Generate()
109 __ ctc1(scratch2, FCSR); in Generate()
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| D | assembler-mips.h | 310 const FPUControlRegister FCSR = { kFCSRRegister }; variable
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| /external/v8/src/mips64/ |
| D | macro-assembler-mips64.cc | 2593 cfc1(scratch, FCSR); in EmitFPUTruncate()
2595 ctc1(zero_reg, FCSR); in EmitFPUTruncate()
2614 cfc1(except_flag, FCSR); in EmitFPUTruncate()
2616 ctc1(scratch, FCSR); in EmitFPUTruncate()
2635 cfc1(scratch2, FCSR); in TryInlineTruncateDoubleToI()
2636 ctc1(zero_reg, FCSR); in TryInlineTruncateDoubleToI()
2641 cfc1(scratch, FCSR); in TryInlineTruncateDoubleToI()
2642 ctc1(scratch2, FCSR); in TryInlineTruncateDoubleToI()
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| D | code-stubs-mips64.cc | 97 __ cfc1(scratch2, FCSR); in Generate()
98 __ ctc1(zero_reg, FCSR); in Generate()
106 __ cfc1(scratch, FCSR); in Generate()
107 __ ctc1(scratch2, FCSR); in Generate()
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| D | assembler-mips64.h | 313 const FPUControlRegister FCSR = { kFCSRRegister }; variable
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| /external/valgrind/none/tests/mips32/ |
| D | round.stdout.exp | 386 -------------------------- test FPU Conversion Operations Using the FCSR Rounding Mode ------------…
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| D | round_fpu64.stdout.exp | 1 -------------------------- test FPU Conversion Operations Using the FCSR Rounding Mode ------------…
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| /external/valgrind/memcheck/ |
| D | mc_machine.c | 1109 if (o == GOF(FCSR) && sz == 4) return -1; /* slot unused */ in get_otrack_shadow_offset_wrk()
1200 if (o == GOF(FCSR) && sz == 4) return -1; /* slot unused */ in get_otrack_shadow_offset_wrk()
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| /external/valgrind/none/tests/mips64/ |
| D | round.stdout.exp | 722 -------------------------- test FPU Conversion Operations Using the FCSR Rounding Mode ------------…
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