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Searched refs:VEX_LIG (Results 1 – 10 of 10) sorted by relevance

/external/llvm/utils/TableGen/
DX86DisassemblerTables.cpp78 bool VEX_LIG = false, bool AdSize64 = false) { in inheritsFrom() argument
136 return (VEX_LIG && inheritsFrom(child, IC_VEX_L_W)) || in inheritsFrom()
138 (VEX_LIG && inheritsFrom(child, IC_VEX_L)); in inheritsFrom()
140 return (VEX_LIG && inheritsFrom(child, IC_VEX_L_W_XS)) || in inheritsFrom()
142 (VEX_LIG && inheritsFrom(child, IC_VEX_L_XS)); in inheritsFrom()
144 return (VEX_LIG && inheritsFrom(child, IC_VEX_L_W_XD)) || in inheritsFrom()
146 (VEX_LIG && inheritsFrom(child, IC_VEX_L_XD)); in inheritsFrom()
148 return (VEX_LIG && inheritsFrom(child, IC_VEX_L_W_OPSIZE)) || in inheritsFrom()
150 (VEX_LIG && inheritsFrom(child, IC_VEX_L_OPSIZE)); in inheritsFrom()
152 return VEX_LIG && inheritsFrom(child, IC_VEX_L_W); in inheritsFrom()
[all …]
/external/llvm/lib/Target/X86/
DX86InstrFMA.td252 int_x86_fma_vfmadd_sd, X86Fmadd>, VEX_LIG;
254 int_x86_fma_vfmsub_sd, X86Fmsub>, VEX_LIG;
257 int_x86_fma_vfnmadd_sd, X86Fnmadd>, VEX_LIG;
259 int_x86_fma_vfnmsub_sd, X86Fnmsub>, VEX_LIG;
276 (OpVT (OpNode RC:$src1, RC:$src2, RC:$src3)))]>, VEX_W, VEX_LIG, MemOp4;
282 (mem_frag addr:$src3)))]>, VEX_W, VEX_LIG, MemOp4;
288 (OpNode RC:$src1, (mem_frag addr:$src2), RC:$src3))]>, VEX_LIG;
295 VEX_LIG;
307 (Int VR128:$src1, VR128:$src2, VR128:$src3))]>, VEX_W, VEX_LIG, MemOp4;
313 mem_cpat:$src3))]>, VEX_W, VEX_LIG, MemOp4;
[all …]
DX86InstrAVX512.td3031 VEX_LIG, XS, EVEX_CD8<32, CD8VT1>;
3034 VEX_LIG, XD, VEX_W, EVEX_CD8<64, CD8VT1>;
3052 XS, EVEX_4V, VEX_LIG;
3058 XD, EVEX_4V, VEX_LIG, VEX_W;
3804 XS, EVEX_4V, VEX_LIG, EVEX_CD8<32, CD8VT1>;
3809 XD, VEX_W, EVEX_4V, VEX_LIG, EVEX_CD8<64, CD8VT1>;
3819 XS, EVEX_4V, VEX_LIG, EVEX_CD8<32, CD8VT1>;
3824 XD, VEX_W, EVEX_4V, VEX_LIG, EVEX_CD8<64, CD8VT1>;
3851 SSE_ALU_ITINS_S.s>, XS, EVEX_4V, VEX_LIG,
3855 SSE_ALU_ITINS_S.d>, XD, VEX_W, EVEX_4V, VEX_LIG,
[all …]
DX86InstrSSE.td536 VEX_4V, VEX_LIG;
541 VEX, VEX_LIG, Sched<[WriteStore]>;
561 IIC_SSE_MOV_S_RM, d>, VEX, VEX_LIG, Sched<[WriteLoad]>;
1484 XS, VEX, VEX_LIG;
1488 XS, VEX, VEX_W, VEX_LIG;
1492 XD, VEX, VEX_LIG;
1496 XD, VEX, VEX_W, VEX_LIG;
1520 XS, VEX_4V, VEX_LIG;
1522 XS, VEX_4V, VEX_W, VEX_LIG;
1524 XD, VEX_4V, VEX_LIG;
[all …]
DX86InstrFormats.td196 class VEX_LIG { bit ignoresVEX_L = 1; }
/external/swiftshader/third_party/LLVM/utils/TableGen/
DX86DisassemblerTables.cpp36 bool VEX_LIG = false) { in inheritsFrom() argument
80 (VEX_LIG && inheritsFrom(child, IC_VEX_L)); in inheritsFrom()
83 (VEX_LIG && inheritsFrom(child, IC_VEX_L_XS)); in inheritsFrom()
86 (VEX_LIG && inheritsFrom(child, IC_VEX_L_XD)); in inheritsFrom()
89 (VEX_LIG && inheritsFrom(child, IC_VEX_L_OPSIZE)); in inheritsFrom()
/external/swiftshader/third_party/LLVM/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h403 VEX_LIG = 1U << 5, enumerator
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86InstrSSE.td338 VEX_LIG;
341 VEX_LIG;
348 XS, VEX_4V, VEX_LIG;
352 XD, VEX_4V, VEX_LIG;
357 VEX_LIG;
360 VEX_LIG;
365 [(store FR32:$src, addr:$dst)]>, XS, VEX, VEX_LIG;
368 [(store FR64:$src, addr:$dst)]>, XD, VEX, VEX_LIG;
1344 VEX_LIG;
1347 VEX_W, VEX_LIG;
[all …]
DX86InstrFormats.td116 class VEX_LIG { bit ignoresVEX_L = 1; }
/external/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h512 VEX_LIG = 1ULL << VEX_LIGShift, enumerator