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Searched refs:isVirtualRegister (Results 1 – 25 of 161) sorted by relevance

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/external/llvm/include/llvm/CodeGen/
DVirtRegMap.h99 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in getPhys()
106 assert(TargetRegisterInfo::isVirtualRegister(virtReg) && in assignVirt2Phys()
117 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in clearVirt()
169 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in getStackSlot()
DMachineRegisterInfo.h80 if (TargetRegisterInfo::isVirtualRegister(RegNo)) in getRegUseDefListHead()
86 if (TargetRegisterInfo::isVirtualRegister(RegNo)) in getRegUseDefListHead()
195 assert(TargetRegisterInfo::isVirtualRegister(VReg) && "Must pass a VReg"); in shouldTrackSubRegLiveness()
671 assert(TargetRegisterInfo::isVirtualRegister(VReg)); in setRegAllocationHint()
686 assert(TargetRegisterInfo::isVirtualRegister(VReg)); in getRegAllocationHint()
693 assert(TargetRegisterInfo::isVirtualRegister(VReg)); in getSimpleHint()
1031 if (TargetRegisterInfo::isVirtualRegister(RegUnit)) { in PSetIterator()
/external/llvm/lib/Target/Hexagon/
DHexagonPeephole.cpp145 if (TargetRegisterInfo::isVirtualRegister(DstReg) && in runOnMachineFunction()
146 TargetRegisterInfo::isVirtualRegister(SrcReg)) { in runOnMachineFunction()
194 if (TargetRegisterInfo::isVirtualRegister(DstReg) && in runOnMachineFunction()
195 TargetRegisterInfo::isVirtualRegister(SrcReg)) { in runOnMachineFunction()
216 if (TargetRegisterInfo::isVirtualRegister(DstReg) && in runOnMachineFunction()
217 TargetRegisterInfo::isVirtualRegister(SrcReg)) { in runOnMachineFunction()
248 if (TargetRegisterInfo::isVirtualRegister(Reg0)) { in runOnMachineFunction()
DHexagonRDF.cpp23 if (TargetRegisterInfo::isVirtualRegister(RA.Reg) && in covers()
24 TargetRegisterInfo::isVirtualRegister(RB.Reg)) { in covers()
43 assert(TargetRegisterInfo::isVirtualRegister(RR.Reg)); in covers()
DHexagonGenPredicate.cpp111 if (!TargetRegisterInfo::isVirtualRegister(R)) in INITIALIZE_PASS_DEPENDENCY()
194 if (TargetRegisterInfo::isVirtualRegister(RD.R)) in collectPredicateGPR()
228 assert(TargetRegisterInfo::isVirtualRegister(Reg.R)); in getPredRegFor()
456 if (!TargetRegisterInfo::isVirtualRegister(DR.R)) in eliminatePredCopies()
458 if (!TargetRegisterInfo::isVirtualRegister(SR.R)) in eliminatePredCopies()
/external/llvm/lib/Target/ARM/
DA15SDOptimizer.cpp141 if (TargetRegisterInfo::isVirtualRegister(Reg)) in usesRegClass()
157 if (!TRI->isVirtualRegister(SReg)) in getPrefSPRLane()
172 if (TargetRegisterInfo::isVirtualRegister(SReg)) { in getPrefSPRLane()
199 if (!TRI->isVirtualRegister(Reg)) in eraseInstrWithNoUses()
222 if (!TRI->isVirtualRegister(DefReg)) { in eraseInstrWithNoUses()
258 if (TRI->isVirtualRegister(DPRReg) && TRI->isVirtualRegister(SPRReg)) { in optimizeSDPattern()
308 if (!TRI->isVirtualRegister(OpReg)) in optimizeSDPattern()
352 if (!TRI->isVirtualRegister(MI->getOperand(1).getReg())) in elideCopies()
380 if (!TRI->isVirtualRegister(Reg)) { in elideCopiesAndPHIs()
389 if (!TRI->isVirtualRegister(MI->getOperand(1).getReg())) in elideCopiesAndPHIs()
[all …]
DMLxExpansionPass.cpp101 if (TargetRegisterInfo::isVirtualRegister(Reg)) { in getAccDefMI()
107 if (TargetRegisterInfo::isVirtualRegister(Reg)) { in getAccDefMI()
159 if (TargetRegisterInfo::isVirtualRegister(SrcReg)) { in hasLoopHazard()
167 if (TargetRegisterInfo::isVirtualRegister(Reg)) { in hasLoopHazard()
173 if (TargetRegisterInfo::isVirtualRegister(Reg)) { in hasLoopHazard()
/external/llvm/lib/CodeGen/
DMachineCSE.cpp129 if (!TargetRegisterInfo::isVirtualRegister(Reg)) in INITIALIZE_PASS_DEPENDENCY()
136 if (!TargetRegisterInfo::isVirtualRegister(SrcReg)) in INITIALIZE_PASS_DEPENDENCY()
227 if (TargetRegisterInfo::isVirtualRegister(Reg)) in hasLivePhysRegDefUses()
245 if (TargetRegisterInfo::isVirtualRegister(Reg)) in hasLivePhysRegDefUses()
318 if (TargetRegisterInfo::isVirtualRegister(MOReg)) in PhysRegDefsReach()
373 if (TargetRegisterInfo::isVirtualRegister(CSReg) && in isProfitableToCSE()
374 TargetRegisterInfo::isVirtualRegister(Reg)) { in isProfitableToCSE()
404 TargetRegisterInfo::isVirtualRegister(MO.getReg())) { in isProfitableToCSE()
557 assert(TargetRegisterInfo::isVirtualRegister(OldReg) && in ProcessBlock()
558 TargetRegisterInfo::isVirtualRegister(NewReg) && in ProcessBlock()
DDetectDeadLanes.cpp201 if (!TargetRegisterInfo::isVirtualRegister(MOReg)) in addUsedLanesOnOperand()
225 if (!MO.isReg() || !TargetRegisterInfo::isVirtualRegister(MO.getReg())) in transferUsedLanesStep()
292 if (!TargetRegisterInfo::isVirtualRegister(DefReg)) in transferDefinedLanesStep()
393 assert(TargetRegisterInfo::isVirtualRegister(MOReg)); in determineInitialDefinedLanes()
437 if (TargetRegisterInfo::isVirtualRegister(DefReg)) { in determineInitialUsedLanes()
477 if (!TargetRegisterInfo::isVirtualRegister(DefReg)) in isUndefInput()
489 if (TargetRegisterInfo::isVirtualRegister(MOReg)) { in isUndefInput()
545 if (!TargetRegisterInfo::isVirtualRegister(Reg)) in runOnce()
DRegAllocFast.cpp261 assert(TargetRegisterInfo::isVirtualRegister(VirtReg) && in killVirtReg()
271 assert(TargetRegisterInfo::isVirtualRegister(VirtReg) && in spillVirtReg()
529 assert(TargetRegisterInfo::isVirtualRegister(VirtReg) && in allocVirtReg()
602 assert(TargetRegisterInfo::isVirtualRegister(VirtReg) && in defineVirtReg()
636 assert(TargetRegisterInfo::isVirtualRegister(VirtReg) && in reloadVirtReg()
722 if (!TargetRegisterInfo::isVirtualRegister(Reg)) in handleThroughOperands()
752 if (!TargetRegisterInfo::isVirtualRegister(Reg)) continue; in handleThroughOperands()
777 if (!TargetRegisterInfo::isVirtualRegister(Reg)) continue; in handleThroughOperands()
850 assert(TargetRegisterInfo::isVirtualRegister(i->VirtReg) && in AllocateBasicBlock()
867 if (!TargetRegisterInfo::isVirtualRegister(Reg)) continue; in AllocateBasicBlock()
[all …]
DVirtRegMap.cpp86 if (TargetRegisterInfo::isVirtualRegister(Hint)) in hasPreferredPhys()
95 if (TargetRegisterInfo::isVirtualRegister(Hint.second)) in hasKnownPreference()
101 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in assignVirt2StackSlot()
109 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in assignVirt2StackSlot()
396 if (!MO.isReg() || !TargetRegisterInfo::isVirtualRegister(MO.getReg())) in rewrite()
DOptimizePHIs.cpp113 TargetRegisterInfo::isVirtualRegister(SrcMI->getOperand(1).getReg())) in IsSingleValuePHICycle()
136 assert(TargetRegisterInfo::isVirtualRegister(DstReg) && in IsDeadPHICycle()
/external/llvm/lib/Target/AMDGPU/
DSIFoldOperands.cpp111 if (TargetRegisterInfo::isVirtualRegister(Old.getReg()) && in updateOperand()
112 TargetRegisterInfo::isVirtualRegister(New->getReg())) { in updateOperand()
211 = TargetRegisterInfo::isVirtualRegister(UseReg) ? in foldOperand()
239 = TargetRegisterInfo::isVirtualRegister(DestReg) ? in foldOperand()
334 !TargetRegisterInfo::isVirtualRegister(OpToFold.getReg())) in runOnMachineFunction()
345 !TargetRegisterInfo::isVirtualRegister(Dst.getReg())) in runOnMachineFunction()
DSIFixSGPRCopies.cpp119 !TargetRegisterInfo::isVirtualRegister(MI.getOperand(i).getReg())) in hasVGPROperands()
136 TargetRegisterInfo::isVirtualRegister(SrcReg) ? in getCopyRegClasses()
144 TargetRegisterInfo::isVirtualRegister(DstReg) ? in getCopyRegClasses()
261 if (!TargetRegisterInfo::isVirtualRegister(MI.getOperand(0).getReg())) in runOnMachineFunction()
DSIShrinkInstructions.cpp74 if (TargetRegisterInfo::isVirtualRegister(MO->getReg())) in isVGPR()
282 if (TargetRegisterInfo::isVirtualRegister(Dest.getReg()) && in runOnMachineFunction()
329 if (TargetRegisterInfo::isVirtualRegister(DstReg)) { in runOnMachineFunction()
353 if (TargetRegisterInfo::isVirtualRegister(SReg)) { in runOnMachineFunction()
DSILowerI1Copies.cpp98 if (!TargetRegisterInfo::isVirtualRegister(Src.getReg()) || in runOnMachineFunction()
99 !TargetRegisterInfo::isVirtualRegister(Dst.getReg())) in runOnMachineFunction()
/external/swiftshader/third_party/LLVM/lib/CodeGen/
DVirtRegMap.cpp121 if (TargetRegisterInfo::isVirtualRegister(physReg) && hasPhys(physReg)) in getRegAllocPref()
130 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in assignVirt2StackSlot()
138 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in assignVirt2StackSlot()
148 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in assignVirtReMatId()
156 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in assignVirtReMatId()
279 if (!MO.isReg() || !TargetRegisterInfo::isVirtualRegister(MO.getReg())) in rewrite()
DMachineCSE.cpp119 if (!TargetRegisterInfo::isVirtualRegister(Reg)) in PerformTrivialCoalescing()
131 if (!TargetRegisterInfo::isVirtualRegister(SrcReg)) in PerformTrivialCoalescing()
201 if (TargetRegisterInfo::isVirtualRegister(Reg)) in hasLivePhysRegDefUses()
240 if (TargetRegisterInfo::isVirtualRegister(MOReg)) in PhysRegDefsReach()
303 TargetRegisterInfo::isVirtualRegister(MO.getReg())) { in isProfitableToCSE()
434 assert(TargetRegisterInfo::isVirtualRegister(OldReg) && in ProcessBlock()
435 TargetRegisterInfo::isVirtualRegister(NewReg) && in ProcessBlock()
DVirtRegMap.h178 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in getPhys()
185 assert(TargetRegisterInfo::isVirtualRegister(virtReg) && in assignVirt2Phys()
196 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in clearVirt()
249 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in getStackSlot()
256 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in getReMatId()
DRegAllocFast.cpp236 assert(TargetRegisterInfo::isVirtualRegister(VirtReg) && in killVirtReg()
246 assert(TargetRegisterInfo::isVirtualRegister(VirtReg) && in spillVirtReg()
482 assert(TargetRegisterInfo::isVirtualRegister(VirtReg) && in allocVirtReg()
543 assert(TargetRegisterInfo::isVirtualRegister(VirtReg) && in defineVirtReg()
577 assert(TargetRegisterInfo::isVirtualRegister(VirtReg) && in reloadVirtReg()
657 if (!TargetRegisterInfo::isVirtualRegister(Reg)) in handleThroughOperands()
690 if (!TargetRegisterInfo::isVirtualRegister(Reg)) continue; in handleThroughOperands()
799 assert(TargetRegisterInfo::isVirtualRegister(i->first) && in AllocateBasicBlock()
817 if (!TargetRegisterInfo::isVirtualRegister(Reg)) continue; in AllocateBasicBlock()
883 if (TargetRegisterInfo::isVirtualRegister(Reg)) { in AllocateBasicBlock()
[all …]
DRegAllocLinearScan.cpp379 if (TargetRegisterInfo::isVirtualRegister(reg)) in printIntervals()
481 if (TargetRegisterInfo::isVirtualRegister(CandReg)) { in attemptTrivialCoalescing()
608 assert(TargetRegisterInfo::isVirtualRegister(cur->reg) && in linearScan()
627 assert(TargetRegisterInfo::isVirtualRegister(reg) && in linearScan()
697 assert(TargetRegisterInfo::isVirtualRegister(reg) && in processActiveIntervals()
710 assert(TargetRegisterInfo::isVirtualRegister(reg) && in processActiveIntervals()
751 assert(TargetRegisterInfo::isVirtualRegister(reg) && in processInactiveIntervals()
1023 assert(TargetRegisterInfo::isVirtualRegister(Reg) && in assignRegOrStackSlotAtInterval()
1145 assert(TargetRegisterInfo::isVirtualRegister(reg) && in assignRegOrStackSlotAtInterval()
1352 assert(TargetRegisterInfo::isVirtualRegister(i->reg) && in assignRegOrStackSlotAtInterval()
[all …]
DOptimizePHIs.cpp109 TargetRegisterInfo::isVirtualRegister(SrcMI->getOperand(1).getReg())) in IsSingleValuePHICycle()
132 assert(TargetRegisterInfo::isVirtualRegister(DstReg) && in IsDeadPHICycle()
/external/swiftshader/third_party/LLVM/include/llvm/Target/
DTargetRegisterInfo.h280 static bool isVirtualRegister(unsigned Reg) { in isVirtualRegister() function
288 assert(isVirtualRegister(Reg) && "Not a virtual register"); in virtReg2Index()
333 if (isVirtualRegister(regA) || isVirtualRegister(regB)) in regsOverlap()
/external/llvm/lib/Target/PowerPC/
DPPCMIPeephole.cpp125 && TargetRegisterInfo::isVirtualRegister(TrueReg1)) { in simplifyCode()
215 if (!TargetRegisterInfo::isVirtualRegister(CopySrcReg)) in lookThruCopyLike()
DPPCVSXFMAMutate.cpp130 if (TargetRegisterInfo::isVirtualRegister(AddendSrcReg)) { in processBlock()
211 if (TargetRegisterInfo::isVirtualRegister(AddendSrcReg) && in processBlock()
317 if (!TargetRegisterInfo::isVirtualRegister(AddendSrcReg)) in processBlock()

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