| /external/llvm/test/CodeGen/AArch64/ |
| D | fast-isel-int-ext3.ll | 10 ; CHECK: ldurb [[REG:w[0-9]+]], [x0, #-8]
32 ; CHECK: ldurb w[[REG:[0-9]+]], [x0, #-8]
65 ; CHECK: ldurb [[REG:w[0-9]+]], [x0, #-8]
87 ; CHECK: ldurb [[REG:w[0-9]+]], [x0, #-8]
|
| D | arm64-zextload-unscaled.ll | 7 ; CHECK: ldurb {{w[0-9]+}}, [{{x[0-9]+}}, #-7]
19 ; CHECK: ldurb {{w[0-9]+}}, [{{x[0-9]+}}, #-7]
|
| D | arm64-ldur.ll | 29 ; CHECK: ldurb w0, [x0, #-1]
60 ; CHECK: ldurb w0, [x0, #-12]
|
| D | regress-tblgen-chains.ll | 28 ; CHECK: ldurb {{w[0-9]+}}, [x29, [[LOCADDR:#-?[0-9]+]]]
|
| D | ldst-unscaledimm.ll | 33 ; CHECK: ldurb {{w[0-9]+}}, [{{x[0-9]+}}, #-12]
40 ; CHECK: ldurb {{w[0-9]+}}, [{{x[0-9]+}}, #-1]
56 ; CHECK: ldurb {{w[0-9]+}}, [{{x[0-9]+}}, #-9]
|
| D | fast-isel-int-ext2.ll | 10 ; CHECK: ldurb w0, [x0, #-8]
38 ; CHECK: ldurb w0, [x0, #-8]
|
| D | fast-isel-int-ext.ll | 152 ; CHECK: ldurb w0, [x0, #-8]
174 ; CHECK: ldurb w0, [x0, #-8]
|
| D | arm64-atomic.ll | 172 ; CHECK: ldurb {{w[0-9]+}}, [x0, #-256]
|
| /external/llvm/test/MC/AArch64/ |
| D | arm64-memory.s | 616 ; CHECK: ldurb w3, [x1, #-1] ; encoding: [0x23,0xf0,0x5f,0x38]
|
| D | basic-a64-diagnostics.s | 1898 ldurb w2, [sp, #256]
|
| D | basic-a64-instructions.s | 2347 ldurb w1, [x20, #255]
|
| /external/vixl/test/aarch64/ |
| D | test-disasm-aarch64.cc | 1438 COMPARE(ldurb(w0, MemOperand(x1)), "ldurb w0, [x1]"); in TEST()
1439 COMPARE(ldurb(x2, MemOperand(x3, 1)), "ldurb w2, [x3, #1]"); in TEST()
1440 COMPARE(ldurb(w4, MemOperand(x5, 255)), "ldurb w4, [x5, #255]"); in TEST()
1530 COMPARE(ldurb(w0, MemOperand(x1), option), "ldurb w0, [x1]"); in TEST()
1531 COMPARE(ldurb(x2, MemOperand(x3, 1), option), "ldurb w2, [x3, #1]"); in TEST()
1532 COMPARE(ldurb(w4, MemOperand(x5, 255), option), "ldurb w4, [x5, #255]"); in TEST()
|
| D | test-trace-aarch64.cc | 212 __ ldurb(w14, MemOperand(x0, 1)); in GenerateTestSequenceBase() local
213 __ ldurb(x15, MemOperand(x0, 1)); in GenerateTestSequenceBase() local
|
| D | test-assembler-aarch64.cc | 16563 __ ldurb(w2, MemOperand(x0, offset), RequireUnscaledOffset); in TEST() local
|
| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.h | 1039 void ldurb(const Register& rt,
|
| D | assembler-aarch64.cc | 1111 void Assembler::ldurb(const Register& rt, in ldurb() function in vixl::aarch64::Assembler
|
| /external/vixl/test/test-trace-reference/ |
| D | log-disasm | 158 0x~~~~~~~~~~~~~~~~ 3840100e ldurb w14, [x0, #1]
159 0x~~~~~~~~~~~~~~~~ 3840100f ldurb w15, [x0, #1]
|
| D | log-disasm-colour | 158 0x~~~~~~~~~~~~~~~~ 3840100e ldurb w14, [x0, #1]
159 0x~~~~~~~~~~~~~~~~ 3840100f ldurb w15, [x0, #1]
|
| D | log-all | 421 0x~~~~~~~~~~~~~~~~ 3840100e ldurb w14, [x0, #1]
423 0x~~~~~~~~~~~~~~~~ 3840100f ldurb w15, [x0, #1]
|
| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 682 void ldurb(const Register& rt, const MemOperand& src,
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | basic-a64-instructions.txt | 2028 # CHECK: ldurb w1, [x20, #255]
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 1721 : LoadUnscaled<0b00, 0, 0b01, GPR32, "ldurb",
|