/external/llvm/test/CodeGen/Mips/llvm-ir/ |
D | mul.ll | 196 ; 32R6: muhu $[[T2:[0-9]+]], $5, $7 219 ; MM32R6: muhu $[[T3:[0-9]+]], $5, $7
|
/external/llvm/test/CodeGen/Mips/ |
D | madd-msub.ll | 76 ; 32R6-DAG: muhu $[[T3:[0-9]+]], ${{[45]}}, ${{[45]}} 197 ; 32R6-DAG: muhu $[[T0:[0-9]+]], ${{[45]}}, ${{[45]}}
|
/external/llvm/test/MC/Mips/micromips64r6/ |
D | valid.s | 265 muhu $3, $4, $5 # CHECK muhu $3, $4, $5 # encoding: [0x00,0xa4,0x18,0xd8]
|
/external/llvm/test/MC/Mips/micromips32r6/ |
D | valid.s | 101 muhu $3, $4, $5 # CHECK muhu $3, $4, $5 # encoding: [0x00,0xa4,0x18,0xd8]
|
/external/llvm/test/MC/Disassembler/Mips/mips32r6/ |
D | valid-mips32r6-el.txt | 105 0xd9 0x10 0x64 0x00 # CHECK: muhu $2, $3, $4
|
D | valid-mips32r6.txt | 17 0x00 0x64 0x10 0xd9 # CHECK: muhu $2, $3, $4
|
/external/llvm/test/MC/Disassembler/Mips/mips64r6/ |
D | valid-mips64r6-el.txt | 154 0xd9 0x10 0x64 0x00 # CHECK: muhu $2, $3, $4
|
D | valid-mips64r6.txt | 24 0x00 0x64 0x10 0xd9 # CHECK: muhu $2, $3, $4
|
/external/llvm/test/MC/Disassembler/Mips/micromips64r6/ |
D | valid.txt | 261 0x00 0xa4 0x18 0xd8 # CHECK: muhu $3, $4, $5
|
/external/llvm/test/MC/Disassembler/Mips/micromips32r6/ |
D | valid.txt | 95 0x00 0xa4 0x18 0xd8 # CHECK: muhu $3, $4, $5
|
/external/v8/src/mips/ |
D | assembler-mips.h | 738 void muhu(Register rd, Register rs, Register rt);
|
D | macro-assembler-mips.cc | 661 muhu(rd_hi, rs, reg); in Mulu() 666 muhu(rd_hi, rs, reg); in Mulu() 711 muhu(rd, rs, rt.rm()); in Mulhu() 721 muhu(rd, rs, at); in Mulhu()
|
D | assembler-mips.cc | 1622 void Assembler::muhu(Register rd, Register rs, Register rt) { in muhu() function in v8::internal::Assembler
|
/external/llvm/lib/Target/Mips/ |
D | MicroMips32r6InstrInfo.td | 108 class MUHU_MMR6_ENC : ARITH_FM_MMR6<"muhu", 0xd8>; 342 class MUHU_MMR6_DESC : ArithLogicR<"muhu", GPR32Opnd, 1, II_MUHU, mulhu>;
|
D | Mips32r6InstrInfo.td | 539 class MUHU_DESC : MUL_R6_DESC_BASE<"muhu", GPR32Opnd, II_MUHU, mulhu>;
|
/external/v8/src/mips64/ |
D | assembler-mips64.h | 750 void muhu(Register rd, Register rs, Register rt);
|
D | macro-assembler-mips64.cc | 671 muhu(rd, rs, rt.rm()); in Mulhu() 681 muhu(rd, rs, at); in Mulhu()
|
D | assembler-mips64.cc | 1621 void Assembler::muhu(Register rd, Register rs, Register rt) { in muhu() function in v8::internal::Assembler
|