1 /*
2 * Copyright (C) 2011 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17 #include "assembler_x86.h"
18
19 #include "base/casts.h"
20 #include "entrypoints/quick/quick_entrypoints.h"
21 #include "memory_region.h"
22 #include "thread.h"
23
24 namespace art {
25 namespace x86 {
26
operator <<(std::ostream & os,const XmmRegister & reg)27 std::ostream& operator<<(std::ostream& os, const XmmRegister& reg) {
28 return os << "XMM" << static_cast<int>(reg);
29 }
30
operator <<(std::ostream & os,const X87Register & reg)31 std::ostream& operator<<(std::ostream& os, const X87Register& reg) {
32 return os << "ST" << static_cast<int>(reg);
33 }
34
call(Register reg)35 void X86Assembler::call(Register reg) {
36 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
37 EmitUint8(0xFF);
38 EmitRegisterOperand(2, reg);
39 }
40
41
call(const Address & address)42 void X86Assembler::call(const Address& address) {
43 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
44 EmitUint8(0xFF);
45 EmitOperand(2, address);
46 }
47
48
call(Label * label)49 void X86Assembler::call(Label* label) {
50 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
51 EmitUint8(0xE8);
52 static const int kSize = 5;
53 // Offset by one because we already have emitted the opcode.
54 EmitLabel(label, kSize - 1);
55 }
56
57
call(const ExternalLabel & label)58 void X86Assembler::call(const ExternalLabel& label) {
59 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
60 intptr_t call_start = buffer_.GetPosition();
61 EmitUint8(0xE8);
62 EmitInt32(label.address());
63 static const intptr_t kCallExternalLabelSize = 5;
64 DCHECK_EQ((buffer_.GetPosition() - call_start), kCallExternalLabelSize);
65 }
66
67
pushl(Register reg)68 void X86Assembler::pushl(Register reg) {
69 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
70 EmitUint8(0x50 + reg);
71 }
72
73
pushl(const Address & address)74 void X86Assembler::pushl(const Address& address) {
75 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
76 EmitUint8(0xFF);
77 EmitOperand(6, address);
78 }
79
80
pushl(const Immediate & imm)81 void X86Assembler::pushl(const Immediate& imm) {
82 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
83 if (imm.is_int8()) {
84 EmitUint8(0x6A);
85 EmitUint8(imm.value() & 0xFF);
86 } else {
87 EmitUint8(0x68);
88 EmitImmediate(imm);
89 }
90 }
91
92
popl(Register reg)93 void X86Assembler::popl(Register reg) {
94 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
95 EmitUint8(0x58 + reg);
96 }
97
98
popl(const Address & address)99 void X86Assembler::popl(const Address& address) {
100 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
101 EmitUint8(0x8F);
102 EmitOperand(0, address);
103 }
104
105
movl(Register dst,const Immediate & imm)106 void X86Assembler::movl(Register dst, const Immediate& imm) {
107 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
108 EmitUint8(0xB8 + dst);
109 EmitImmediate(imm);
110 }
111
112
movl(Register dst,Register src)113 void X86Assembler::movl(Register dst, Register src) {
114 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
115 EmitUint8(0x89);
116 EmitRegisterOperand(src, dst);
117 }
118
119
movl(Register dst,const Address & src)120 void X86Assembler::movl(Register dst, const Address& src) {
121 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
122 EmitUint8(0x8B);
123 EmitOperand(dst, src);
124 }
125
126
movl(const Address & dst,Register src)127 void X86Assembler::movl(const Address& dst, Register src) {
128 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
129 EmitUint8(0x89);
130 EmitOperand(src, dst);
131 }
132
133
movl(const Address & dst,const Immediate & imm)134 void X86Assembler::movl(const Address& dst, const Immediate& imm) {
135 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
136 EmitUint8(0xC7);
137 EmitOperand(0, dst);
138 EmitImmediate(imm);
139 }
140
movl(const Address & dst,Label * lbl)141 void X86Assembler::movl(const Address& dst, Label* lbl) {
142 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
143 EmitUint8(0xC7);
144 EmitOperand(0, dst);
145 EmitLabel(lbl, dst.length_ + 5);
146 }
147
movntl(const Address & dst,Register src)148 void X86Assembler::movntl(const Address& dst, Register src) {
149 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
150 EmitUint8(0x0F);
151 EmitUint8(0xC3);
152 EmitOperand(src, dst);
153 }
154
bswapl(Register dst)155 void X86Assembler::bswapl(Register dst) {
156 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
157 EmitUint8(0x0F);
158 EmitUint8(0xC8 + dst);
159 }
160
bsfl(Register dst,Register src)161 void X86Assembler::bsfl(Register dst, Register src) {
162 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
163 EmitUint8(0x0F);
164 EmitUint8(0xBC);
165 EmitRegisterOperand(dst, src);
166 }
167
bsfl(Register dst,const Address & src)168 void X86Assembler::bsfl(Register dst, const Address& src) {
169 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
170 EmitUint8(0x0F);
171 EmitUint8(0xBC);
172 EmitOperand(dst, src);
173 }
174
bsrl(Register dst,Register src)175 void X86Assembler::bsrl(Register dst, Register src) {
176 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
177 EmitUint8(0x0F);
178 EmitUint8(0xBD);
179 EmitRegisterOperand(dst, src);
180 }
181
bsrl(Register dst,const Address & src)182 void X86Assembler::bsrl(Register dst, const Address& src) {
183 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
184 EmitUint8(0x0F);
185 EmitUint8(0xBD);
186 EmitOperand(dst, src);
187 }
188
popcntl(Register dst,Register src)189 void X86Assembler::popcntl(Register dst, Register src) {
190 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
191 EmitUint8(0xF3);
192 EmitUint8(0x0F);
193 EmitUint8(0xB8);
194 EmitRegisterOperand(dst, src);
195 }
196
popcntl(Register dst,const Address & src)197 void X86Assembler::popcntl(Register dst, const Address& src) {
198 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
199 EmitUint8(0xF3);
200 EmitUint8(0x0F);
201 EmitUint8(0xB8);
202 EmitOperand(dst, src);
203 }
204
movzxb(Register dst,ByteRegister src)205 void X86Assembler::movzxb(Register dst, ByteRegister src) {
206 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
207 EmitUint8(0x0F);
208 EmitUint8(0xB6);
209 EmitRegisterOperand(dst, src);
210 }
211
212
movzxb(Register dst,const Address & src)213 void X86Assembler::movzxb(Register dst, const Address& src) {
214 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
215 EmitUint8(0x0F);
216 EmitUint8(0xB6);
217 EmitOperand(dst, src);
218 }
219
220
movsxb(Register dst,ByteRegister src)221 void X86Assembler::movsxb(Register dst, ByteRegister src) {
222 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
223 EmitUint8(0x0F);
224 EmitUint8(0xBE);
225 EmitRegisterOperand(dst, src);
226 }
227
228
movsxb(Register dst,const Address & src)229 void X86Assembler::movsxb(Register dst, const Address& src) {
230 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
231 EmitUint8(0x0F);
232 EmitUint8(0xBE);
233 EmitOperand(dst, src);
234 }
235
236
movb(Register,const Address &)237 void X86Assembler::movb(Register /*dst*/, const Address& /*src*/) {
238 LOG(FATAL) << "Use movzxb or movsxb instead.";
239 }
240
241
movb(const Address & dst,ByteRegister src)242 void X86Assembler::movb(const Address& dst, ByteRegister src) {
243 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
244 EmitUint8(0x88);
245 EmitOperand(src, dst);
246 }
247
248
movb(const Address & dst,const Immediate & imm)249 void X86Assembler::movb(const Address& dst, const Immediate& imm) {
250 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
251 EmitUint8(0xC6);
252 EmitOperand(EAX, dst);
253 CHECK(imm.is_int8());
254 EmitUint8(imm.value() & 0xFF);
255 }
256
257
movzxw(Register dst,Register src)258 void X86Assembler::movzxw(Register dst, Register src) {
259 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
260 EmitUint8(0x0F);
261 EmitUint8(0xB7);
262 EmitRegisterOperand(dst, src);
263 }
264
265
movzxw(Register dst,const Address & src)266 void X86Assembler::movzxw(Register dst, const Address& src) {
267 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
268 EmitUint8(0x0F);
269 EmitUint8(0xB7);
270 EmitOperand(dst, src);
271 }
272
273
movsxw(Register dst,Register src)274 void X86Assembler::movsxw(Register dst, Register src) {
275 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
276 EmitUint8(0x0F);
277 EmitUint8(0xBF);
278 EmitRegisterOperand(dst, src);
279 }
280
281
movsxw(Register dst,const Address & src)282 void X86Assembler::movsxw(Register dst, const Address& src) {
283 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
284 EmitUint8(0x0F);
285 EmitUint8(0xBF);
286 EmitOperand(dst, src);
287 }
288
289
movw(Register,const Address &)290 void X86Assembler::movw(Register /*dst*/, const Address& /*src*/) {
291 LOG(FATAL) << "Use movzxw or movsxw instead.";
292 }
293
294
movw(const Address & dst,Register src)295 void X86Assembler::movw(const Address& dst, Register src) {
296 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
297 EmitOperandSizeOverride();
298 EmitUint8(0x89);
299 EmitOperand(src, dst);
300 }
301
302
movw(const Address & dst,const Immediate & imm)303 void X86Assembler::movw(const Address& dst, const Immediate& imm) {
304 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
305 EmitOperandSizeOverride();
306 EmitUint8(0xC7);
307 EmitOperand(0, dst);
308 CHECK(imm.is_uint16() || imm.is_int16());
309 EmitUint8(imm.value() & 0xFF);
310 EmitUint8(imm.value() >> 8);
311 }
312
313
leal(Register dst,const Address & src)314 void X86Assembler::leal(Register dst, const Address& src) {
315 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
316 EmitUint8(0x8D);
317 EmitOperand(dst, src);
318 }
319
320
cmovl(Condition condition,Register dst,Register src)321 void X86Assembler::cmovl(Condition condition, Register dst, Register src) {
322 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
323 EmitUint8(0x0F);
324 EmitUint8(0x40 + condition);
325 EmitRegisterOperand(dst, src);
326 }
327
328
cmovl(Condition condition,Register dst,const Address & src)329 void X86Assembler::cmovl(Condition condition, Register dst, const Address& src) {
330 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
331 EmitUint8(0x0F);
332 EmitUint8(0x40 + condition);
333 EmitOperand(dst, src);
334 }
335
336
setb(Condition condition,Register dst)337 void X86Assembler::setb(Condition condition, Register dst) {
338 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
339 EmitUint8(0x0F);
340 EmitUint8(0x90 + condition);
341 EmitOperand(0, Operand(dst));
342 }
343
344
movaps(XmmRegister dst,XmmRegister src)345 void X86Assembler::movaps(XmmRegister dst, XmmRegister src) {
346 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
347 EmitUint8(0x0F);
348 EmitUint8(0x28);
349 EmitXmmRegisterOperand(dst, src);
350 }
351
352
movaps(XmmRegister dst,const Address & src)353 void X86Assembler::movaps(XmmRegister dst, const Address& src) {
354 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
355 EmitUint8(0x0F);
356 EmitUint8(0x28);
357 EmitOperand(dst, src);
358 }
359
360
movups(XmmRegister dst,const Address & src)361 void X86Assembler::movups(XmmRegister dst, const Address& src) {
362 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
363 EmitUint8(0x0F);
364 EmitUint8(0x10);
365 EmitOperand(dst, src);
366 }
367
368
movaps(const Address & dst,XmmRegister src)369 void X86Assembler::movaps(const Address& dst, XmmRegister src) {
370 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
371 EmitUint8(0x0F);
372 EmitUint8(0x29);
373 EmitOperand(src, dst);
374 }
375
376
movups(const Address & dst,XmmRegister src)377 void X86Assembler::movups(const Address& dst, XmmRegister src) {
378 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
379 EmitUint8(0x0F);
380 EmitUint8(0x11);
381 EmitOperand(src, dst);
382 }
383
384
movss(XmmRegister dst,const Address & src)385 void X86Assembler::movss(XmmRegister dst, const Address& src) {
386 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
387 EmitUint8(0xF3);
388 EmitUint8(0x0F);
389 EmitUint8(0x10);
390 EmitOperand(dst, src);
391 }
392
393
movss(const Address & dst,XmmRegister src)394 void X86Assembler::movss(const Address& dst, XmmRegister src) {
395 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
396 EmitUint8(0xF3);
397 EmitUint8(0x0F);
398 EmitUint8(0x11);
399 EmitOperand(src, dst);
400 }
401
402
movss(XmmRegister dst,XmmRegister src)403 void X86Assembler::movss(XmmRegister dst, XmmRegister src) {
404 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
405 EmitUint8(0xF3);
406 EmitUint8(0x0F);
407 EmitUint8(0x11);
408 EmitXmmRegisterOperand(src, dst);
409 }
410
411
movd(XmmRegister dst,Register src)412 void X86Assembler::movd(XmmRegister dst, Register src) {
413 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
414 EmitUint8(0x66);
415 EmitUint8(0x0F);
416 EmitUint8(0x6E);
417 EmitOperand(dst, Operand(src));
418 }
419
420
movd(Register dst,XmmRegister src)421 void X86Assembler::movd(Register dst, XmmRegister src) {
422 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
423 EmitUint8(0x66);
424 EmitUint8(0x0F);
425 EmitUint8(0x7E);
426 EmitOperand(src, Operand(dst));
427 }
428
429
addss(XmmRegister dst,XmmRegister src)430 void X86Assembler::addss(XmmRegister dst, XmmRegister src) {
431 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
432 EmitUint8(0xF3);
433 EmitUint8(0x0F);
434 EmitUint8(0x58);
435 EmitXmmRegisterOperand(dst, src);
436 }
437
438
addss(XmmRegister dst,const Address & src)439 void X86Assembler::addss(XmmRegister dst, const Address& src) {
440 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
441 EmitUint8(0xF3);
442 EmitUint8(0x0F);
443 EmitUint8(0x58);
444 EmitOperand(dst, src);
445 }
446
447
subss(XmmRegister dst,XmmRegister src)448 void X86Assembler::subss(XmmRegister dst, XmmRegister src) {
449 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
450 EmitUint8(0xF3);
451 EmitUint8(0x0F);
452 EmitUint8(0x5C);
453 EmitXmmRegisterOperand(dst, src);
454 }
455
456
subss(XmmRegister dst,const Address & src)457 void X86Assembler::subss(XmmRegister dst, const Address& src) {
458 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
459 EmitUint8(0xF3);
460 EmitUint8(0x0F);
461 EmitUint8(0x5C);
462 EmitOperand(dst, src);
463 }
464
465
mulss(XmmRegister dst,XmmRegister src)466 void X86Assembler::mulss(XmmRegister dst, XmmRegister src) {
467 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
468 EmitUint8(0xF3);
469 EmitUint8(0x0F);
470 EmitUint8(0x59);
471 EmitXmmRegisterOperand(dst, src);
472 }
473
474
mulss(XmmRegister dst,const Address & src)475 void X86Assembler::mulss(XmmRegister dst, const Address& src) {
476 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
477 EmitUint8(0xF3);
478 EmitUint8(0x0F);
479 EmitUint8(0x59);
480 EmitOperand(dst, src);
481 }
482
483
divss(XmmRegister dst,XmmRegister src)484 void X86Assembler::divss(XmmRegister dst, XmmRegister src) {
485 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
486 EmitUint8(0xF3);
487 EmitUint8(0x0F);
488 EmitUint8(0x5E);
489 EmitXmmRegisterOperand(dst, src);
490 }
491
492
divss(XmmRegister dst,const Address & src)493 void X86Assembler::divss(XmmRegister dst, const Address& src) {
494 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
495 EmitUint8(0xF3);
496 EmitUint8(0x0F);
497 EmitUint8(0x5E);
498 EmitOperand(dst, src);
499 }
500
501
addps(XmmRegister dst,XmmRegister src)502 void X86Assembler::addps(XmmRegister dst, XmmRegister src) {
503 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
504 EmitUint8(0x0F);
505 EmitUint8(0x58);
506 EmitXmmRegisterOperand(dst, src);
507 }
508
509
subps(XmmRegister dst,XmmRegister src)510 void X86Assembler::subps(XmmRegister dst, XmmRegister src) {
511 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
512 EmitUint8(0x0F);
513 EmitUint8(0x5C);
514 EmitXmmRegisterOperand(dst, src);
515 }
516
517
mulps(XmmRegister dst,XmmRegister src)518 void X86Assembler::mulps(XmmRegister dst, XmmRegister src) {
519 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
520 EmitUint8(0x0F);
521 EmitUint8(0x59);
522 EmitXmmRegisterOperand(dst, src);
523 }
524
525
divps(XmmRegister dst,XmmRegister src)526 void X86Assembler::divps(XmmRegister dst, XmmRegister src) {
527 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
528 EmitUint8(0x0F);
529 EmitUint8(0x5E);
530 EmitXmmRegisterOperand(dst, src);
531 }
532
533
movapd(XmmRegister dst,XmmRegister src)534 void X86Assembler::movapd(XmmRegister dst, XmmRegister src) {
535 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
536 EmitUint8(0x66);
537 EmitUint8(0x0F);
538 EmitUint8(0x28);
539 EmitXmmRegisterOperand(dst, src);
540 }
541
542
movapd(XmmRegister dst,const Address & src)543 void X86Assembler::movapd(XmmRegister dst, const Address& src) {
544 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
545 EmitUint8(0x66);
546 EmitUint8(0x0F);
547 EmitUint8(0x28);
548 EmitOperand(dst, src);
549 }
550
551
movupd(XmmRegister dst,const Address & src)552 void X86Assembler::movupd(XmmRegister dst, const Address& src) {
553 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
554 EmitUint8(0x66);
555 EmitUint8(0x0F);
556 EmitUint8(0x10);
557 EmitOperand(dst, src);
558 }
559
560
movapd(const Address & dst,XmmRegister src)561 void X86Assembler::movapd(const Address& dst, XmmRegister src) {
562 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
563 EmitUint8(0x66);
564 EmitUint8(0x0F);
565 EmitUint8(0x29);
566 EmitOperand(src, dst);
567 }
568
569
movupd(const Address & dst,XmmRegister src)570 void X86Assembler::movupd(const Address& dst, XmmRegister src) {
571 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
572 EmitUint8(0x66);
573 EmitUint8(0x0F);
574 EmitUint8(0x11);
575 EmitOperand(src, dst);
576 }
577
578
flds(const Address & src)579 void X86Assembler::flds(const Address& src) {
580 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
581 EmitUint8(0xD9);
582 EmitOperand(0, src);
583 }
584
585
fsts(const Address & dst)586 void X86Assembler::fsts(const Address& dst) {
587 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
588 EmitUint8(0xD9);
589 EmitOperand(2, dst);
590 }
591
592
fstps(const Address & dst)593 void X86Assembler::fstps(const Address& dst) {
594 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
595 EmitUint8(0xD9);
596 EmitOperand(3, dst);
597 }
598
599
movsd(XmmRegister dst,const Address & src)600 void X86Assembler::movsd(XmmRegister dst, const Address& src) {
601 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
602 EmitUint8(0xF2);
603 EmitUint8(0x0F);
604 EmitUint8(0x10);
605 EmitOperand(dst, src);
606 }
607
608
movsd(const Address & dst,XmmRegister src)609 void X86Assembler::movsd(const Address& dst, XmmRegister src) {
610 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
611 EmitUint8(0xF2);
612 EmitUint8(0x0F);
613 EmitUint8(0x11);
614 EmitOperand(src, dst);
615 }
616
617
movsd(XmmRegister dst,XmmRegister src)618 void X86Assembler::movsd(XmmRegister dst, XmmRegister src) {
619 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
620 EmitUint8(0xF2);
621 EmitUint8(0x0F);
622 EmitUint8(0x11);
623 EmitXmmRegisterOperand(src, dst);
624 }
625
626
movhpd(XmmRegister dst,const Address & src)627 void X86Assembler::movhpd(XmmRegister dst, const Address& src) {
628 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
629 EmitUint8(0x66);
630 EmitUint8(0x0F);
631 EmitUint8(0x16);
632 EmitOperand(dst, src);
633 }
634
635
movhpd(const Address & dst,XmmRegister src)636 void X86Assembler::movhpd(const Address& dst, XmmRegister src) {
637 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
638 EmitUint8(0x66);
639 EmitUint8(0x0F);
640 EmitUint8(0x17);
641 EmitOperand(src, dst);
642 }
643
644
addsd(XmmRegister dst,XmmRegister src)645 void X86Assembler::addsd(XmmRegister dst, XmmRegister src) {
646 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
647 EmitUint8(0xF2);
648 EmitUint8(0x0F);
649 EmitUint8(0x58);
650 EmitXmmRegisterOperand(dst, src);
651 }
652
653
addsd(XmmRegister dst,const Address & src)654 void X86Assembler::addsd(XmmRegister dst, const Address& src) {
655 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
656 EmitUint8(0xF2);
657 EmitUint8(0x0F);
658 EmitUint8(0x58);
659 EmitOperand(dst, src);
660 }
661
662
subsd(XmmRegister dst,XmmRegister src)663 void X86Assembler::subsd(XmmRegister dst, XmmRegister src) {
664 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
665 EmitUint8(0xF2);
666 EmitUint8(0x0F);
667 EmitUint8(0x5C);
668 EmitXmmRegisterOperand(dst, src);
669 }
670
671
subsd(XmmRegister dst,const Address & src)672 void X86Assembler::subsd(XmmRegister dst, const Address& src) {
673 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
674 EmitUint8(0xF2);
675 EmitUint8(0x0F);
676 EmitUint8(0x5C);
677 EmitOperand(dst, src);
678 }
679
680
mulsd(XmmRegister dst,XmmRegister src)681 void X86Assembler::mulsd(XmmRegister dst, XmmRegister src) {
682 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
683 EmitUint8(0xF2);
684 EmitUint8(0x0F);
685 EmitUint8(0x59);
686 EmitXmmRegisterOperand(dst, src);
687 }
688
689
mulsd(XmmRegister dst,const Address & src)690 void X86Assembler::mulsd(XmmRegister dst, const Address& src) {
691 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
692 EmitUint8(0xF2);
693 EmitUint8(0x0F);
694 EmitUint8(0x59);
695 EmitOperand(dst, src);
696 }
697
698
divsd(XmmRegister dst,XmmRegister src)699 void X86Assembler::divsd(XmmRegister dst, XmmRegister src) {
700 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
701 EmitUint8(0xF2);
702 EmitUint8(0x0F);
703 EmitUint8(0x5E);
704 EmitXmmRegisterOperand(dst, src);
705 }
706
707
divsd(XmmRegister dst,const Address & src)708 void X86Assembler::divsd(XmmRegister dst, const Address& src) {
709 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
710 EmitUint8(0xF2);
711 EmitUint8(0x0F);
712 EmitUint8(0x5E);
713 EmitOperand(dst, src);
714 }
715
716
addpd(XmmRegister dst,XmmRegister src)717 void X86Assembler::addpd(XmmRegister dst, XmmRegister src) {
718 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
719 EmitUint8(0x66);
720 EmitUint8(0x0F);
721 EmitUint8(0x58);
722 EmitXmmRegisterOperand(dst, src);
723 }
724
725
subpd(XmmRegister dst,XmmRegister src)726 void X86Assembler::subpd(XmmRegister dst, XmmRegister src) {
727 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
728 EmitUint8(0x66);
729 EmitUint8(0x0F);
730 EmitUint8(0x5C);
731 EmitXmmRegisterOperand(dst, src);
732 }
733
734
mulpd(XmmRegister dst,XmmRegister src)735 void X86Assembler::mulpd(XmmRegister dst, XmmRegister src) {
736 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
737 EmitUint8(0x66);
738 EmitUint8(0x0F);
739 EmitUint8(0x59);
740 EmitXmmRegisterOperand(dst, src);
741 }
742
743
divpd(XmmRegister dst,XmmRegister src)744 void X86Assembler::divpd(XmmRegister dst, XmmRegister src) {
745 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
746 EmitUint8(0x66);
747 EmitUint8(0x0F);
748 EmitUint8(0x5E);
749 EmitXmmRegisterOperand(dst, src);
750 }
751
752
movdqa(XmmRegister dst,XmmRegister src)753 void X86Assembler::movdqa(XmmRegister dst, XmmRegister src) {
754 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
755 EmitUint8(0x66);
756 EmitUint8(0x0F);
757 EmitUint8(0x6F);
758 EmitXmmRegisterOperand(dst, src);
759 }
760
761
movdqa(XmmRegister dst,const Address & src)762 void X86Assembler::movdqa(XmmRegister dst, const Address& src) {
763 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
764 EmitUint8(0x66);
765 EmitUint8(0x0F);
766 EmitUint8(0x6F);
767 EmitOperand(dst, src);
768 }
769
770
movdqu(XmmRegister dst,const Address & src)771 void X86Assembler::movdqu(XmmRegister dst, const Address& src) {
772 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
773 EmitUint8(0xF3);
774 EmitUint8(0x0F);
775 EmitUint8(0x6F);
776 EmitOperand(dst, src);
777 }
778
779
movdqa(const Address & dst,XmmRegister src)780 void X86Assembler::movdqa(const Address& dst, XmmRegister src) {
781 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
782 EmitUint8(0x66);
783 EmitUint8(0x0F);
784 EmitUint8(0x7F);
785 EmitOperand(src, dst);
786 }
787
788
movdqu(const Address & dst,XmmRegister src)789 void X86Assembler::movdqu(const Address& dst, XmmRegister src) {
790 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
791 EmitUint8(0xF3);
792 EmitUint8(0x0F);
793 EmitUint8(0x7F);
794 EmitOperand(src, dst);
795 }
796
797
paddb(XmmRegister dst,XmmRegister src)798 void X86Assembler::paddb(XmmRegister dst, XmmRegister src) {
799 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
800 EmitUint8(0x66);
801 EmitUint8(0x0F);
802 EmitUint8(0xFC);
803 EmitXmmRegisterOperand(dst, src);
804 }
805
806
psubb(XmmRegister dst,XmmRegister src)807 void X86Assembler::psubb(XmmRegister dst, XmmRegister src) {
808 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
809 EmitUint8(0x66);
810 EmitUint8(0x0F);
811 EmitUint8(0xF8);
812 EmitXmmRegisterOperand(dst, src);
813 }
814
815
paddw(XmmRegister dst,XmmRegister src)816 void X86Assembler::paddw(XmmRegister dst, XmmRegister src) {
817 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
818 EmitUint8(0x66);
819 EmitUint8(0x0F);
820 EmitUint8(0xFD);
821 EmitXmmRegisterOperand(dst, src);
822 }
823
824
psubw(XmmRegister dst,XmmRegister src)825 void X86Assembler::psubw(XmmRegister dst, XmmRegister src) {
826 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
827 EmitUint8(0x66);
828 EmitUint8(0x0F);
829 EmitUint8(0xF9);
830 EmitXmmRegisterOperand(dst, src);
831 }
832
833
pmullw(XmmRegister dst,XmmRegister src)834 void X86Assembler::pmullw(XmmRegister dst, XmmRegister src) {
835 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
836 EmitUint8(0x66);
837 EmitUint8(0x0F);
838 EmitUint8(0xD5);
839 EmitXmmRegisterOperand(dst, src);
840 }
841
842
paddd(XmmRegister dst,XmmRegister src)843 void X86Assembler::paddd(XmmRegister dst, XmmRegister src) {
844 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
845 EmitUint8(0x66);
846 EmitUint8(0x0F);
847 EmitUint8(0xFE);
848 EmitXmmRegisterOperand(dst, src);
849 }
850
851
psubd(XmmRegister dst,XmmRegister src)852 void X86Assembler::psubd(XmmRegister dst, XmmRegister src) {
853 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
854 EmitUint8(0x66);
855 EmitUint8(0x0F);
856 EmitUint8(0xFA);
857 EmitXmmRegisterOperand(dst, src);
858 }
859
860
pmulld(XmmRegister dst,XmmRegister src)861 void X86Assembler::pmulld(XmmRegister dst, XmmRegister src) {
862 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
863 EmitUint8(0x66);
864 EmitUint8(0x0F);
865 EmitUint8(0x38);
866 EmitUint8(0x40);
867 EmitXmmRegisterOperand(dst, src);
868 }
869
870
paddq(XmmRegister dst,XmmRegister src)871 void X86Assembler::paddq(XmmRegister dst, XmmRegister src) {
872 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
873 EmitUint8(0x66);
874 EmitUint8(0x0F);
875 EmitUint8(0xD4);
876 EmitXmmRegisterOperand(dst, src);
877 }
878
879
psubq(XmmRegister dst,XmmRegister src)880 void X86Assembler::psubq(XmmRegister dst, XmmRegister src) {
881 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
882 EmitUint8(0x66);
883 EmitUint8(0x0F);
884 EmitUint8(0xFB);
885 EmitXmmRegisterOperand(dst, src);
886 }
887
888
cvtsi2ss(XmmRegister dst,Register src)889 void X86Assembler::cvtsi2ss(XmmRegister dst, Register src) {
890 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
891 EmitUint8(0xF3);
892 EmitUint8(0x0F);
893 EmitUint8(0x2A);
894 EmitOperand(dst, Operand(src));
895 }
896
897
cvtsi2sd(XmmRegister dst,Register src)898 void X86Assembler::cvtsi2sd(XmmRegister dst, Register src) {
899 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
900 EmitUint8(0xF2);
901 EmitUint8(0x0F);
902 EmitUint8(0x2A);
903 EmitOperand(dst, Operand(src));
904 }
905
906
cvtss2si(Register dst,XmmRegister src)907 void X86Assembler::cvtss2si(Register dst, XmmRegister src) {
908 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
909 EmitUint8(0xF3);
910 EmitUint8(0x0F);
911 EmitUint8(0x2D);
912 EmitXmmRegisterOperand(dst, src);
913 }
914
915
cvtss2sd(XmmRegister dst,XmmRegister src)916 void X86Assembler::cvtss2sd(XmmRegister dst, XmmRegister src) {
917 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
918 EmitUint8(0xF3);
919 EmitUint8(0x0F);
920 EmitUint8(0x5A);
921 EmitXmmRegisterOperand(dst, src);
922 }
923
924
cvtsd2si(Register dst,XmmRegister src)925 void X86Assembler::cvtsd2si(Register dst, XmmRegister src) {
926 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
927 EmitUint8(0xF2);
928 EmitUint8(0x0F);
929 EmitUint8(0x2D);
930 EmitXmmRegisterOperand(dst, src);
931 }
932
933
cvttss2si(Register dst,XmmRegister src)934 void X86Assembler::cvttss2si(Register dst, XmmRegister src) {
935 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
936 EmitUint8(0xF3);
937 EmitUint8(0x0F);
938 EmitUint8(0x2C);
939 EmitXmmRegisterOperand(dst, src);
940 }
941
942
cvttsd2si(Register dst,XmmRegister src)943 void X86Assembler::cvttsd2si(Register dst, XmmRegister src) {
944 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
945 EmitUint8(0xF2);
946 EmitUint8(0x0F);
947 EmitUint8(0x2C);
948 EmitXmmRegisterOperand(dst, src);
949 }
950
951
cvtsd2ss(XmmRegister dst,XmmRegister src)952 void X86Assembler::cvtsd2ss(XmmRegister dst, XmmRegister src) {
953 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
954 EmitUint8(0xF2);
955 EmitUint8(0x0F);
956 EmitUint8(0x5A);
957 EmitXmmRegisterOperand(dst, src);
958 }
959
960
cvtdq2ps(XmmRegister dst,XmmRegister src)961 void X86Assembler::cvtdq2ps(XmmRegister dst, XmmRegister src) {
962 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
963 EmitUint8(0x0F);
964 EmitUint8(0x5B);
965 EmitXmmRegisterOperand(dst, src);
966 }
967
968
cvtdq2pd(XmmRegister dst,XmmRegister src)969 void X86Assembler::cvtdq2pd(XmmRegister dst, XmmRegister src) {
970 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
971 EmitUint8(0xF3);
972 EmitUint8(0x0F);
973 EmitUint8(0xE6);
974 EmitXmmRegisterOperand(dst, src);
975 }
976
977
comiss(XmmRegister a,XmmRegister b)978 void X86Assembler::comiss(XmmRegister a, XmmRegister b) {
979 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
980 EmitUint8(0x0F);
981 EmitUint8(0x2F);
982 EmitXmmRegisterOperand(a, b);
983 }
984
985
comiss(XmmRegister a,const Address & b)986 void X86Assembler::comiss(XmmRegister a, const Address& b) {
987 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
988 EmitUint8(0x0F);
989 EmitUint8(0x2F);
990 EmitOperand(a, b);
991 }
992
993
comisd(XmmRegister a,XmmRegister b)994 void X86Assembler::comisd(XmmRegister a, XmmRegister b) {
995 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
996 EmitUint8(0x66);
997 EmitUint8(0x0F);
998 EmitUint8(0x2F);
999 EmitXmmRegisterOperand(a, b);
1000 }
1001
1002
comisd(XmmRegister a,const Address & b)1003 void X86Assembler::comisd(XmmRegister a, const Address& b) {
1004 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1005 EmitUint8(0x66);
1006 EmitUint8(0x0F);
1007 EmitUint8(0x2F);
1008 EmitOperand(a, b);
1009 }
1010
1011
ucomiss(XmmRegister a,XmmRegister b)1012 void X86Assembler::ucomiss(XmmRegister a, XmmRegister b) {
1013 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1014 EmitUint8(0x0F);
1015 EmitUint8(0x2E);
1016 EmitXmmRegisterOperand(a, b);
1017 }
1018
1019
ucomiss(XmmRegister a,const Address & b)1020 void X86Assembler::ucomiss(XmmRegister a, const Address& b) {
1021 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1022 EmitUint8(0x0F);
1023 EmitUint8(0x2E);
1024 EmitOperand(a, b);
1025 }
1026
1027
ucomisd(XmmRegister a,XmmRegister b)1028 void X86Assembler::ucomisd(XmmRegister a, XmmRegister b) {
1029 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1030 EmitUint8(0x66);
1031 EmitUint8(0x0F);
1032 EmitUint8(0x2E);
1033 EmitXmmRegisterOperand(a, b);
1034 }
1035
1036
ucomisd(XmmRegister a,const Address & b)1037 void X86Assembler::ucomisd(XmmRegister a, const Address& b) {
1038 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1039 EmitUint8(0x66);
1040 EmitUint8(0x0F);
1041 EmitUint8(0x2E);
1042 EmitOperand(a, b);
1043 }
1044
1045
roundsd(XmmRegister dst,XmmRegister src,const Immediate & imm)1046 void X86Assembler::roundsd(XmmRegister dst, XmmRegister src, const Immediate& imm) {
1047 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1048 EmitUint8(0x66);
1049 EmitUint8(0x0F);
1050 EmitUint8(0x3A);
1051 EmitUint8(0x0B);
1052 EmitXmmRegisterOperand(dst, src);
1053 EmitUint8(imm.value());
1054 }
1055
1056
roundss(XmmRegister dst,XmmRegister src,const Immediate & imm)1057 void X86Assembler::roundss(XmmRegister dst, XmmRegister src, const Immediate& imm) {
1058 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1059 EmitUint8(0x66);
1060 EmitUint8(0x0F);
1061 EmitUint8(0x3A);
1062 EmitUint8(0x0A);
1063 EmitXmmRegisterOperand(dst, src);
1064 EmitUint8(imm.value());
1065 }
1066
1067
sqrtsd(XmmRegister dst,XmmRegister src)1068 void X86Assembler::sqrtsd(XmmRegister dst, XmmRegister src) {
1069 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1070 EmitUint8(0xF2);
1071 EmitUint8(0x0F);
1072 EmitUint8(0x51);
1073 EmitXmmRegisterOperand(dst, src);
1074 }
1075
1076
sqrtss(XmmRegister dst,XmmRegister src)1077 void X86Assembler::sqrtss(XmmRegister dst, XmmRegister src) {
1078 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1079 EmitUint8(0xF3);
1080 EmitUint8(0x0F);
1081 EmitUint8(0x51);
1082 EmitXmmRegisterOperand(dst, src);
1083 }
1084
1085
xorpd(XmmRegister dst,const Address & src)1086 void X86Assembler::xorpd(XmmRegister dst, const Address& src) {
1087 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1088 EmitUint8(0x66);
1089 EmitUint8(0x0F);
1090 EmitUint8(0x57);
1091 EmitOperand(dst, src);
1092 }
1093
1094
xorpd(XmmRegister dst,XmmRegister src)1095 void X86Assembler::xorpd(XmmRegister dst, XmmRegister src) {
1096 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1097 EmitUint8(0x66);
1098 EmitUint8(0x0F);
1099 EmitUint8(0x57);
1100 EmitXmmRegisterOperand(dst, src);
1101 }
1102
1103
xorps(XmmRegister dst,const Address & src)1104 void X86Assembler::xorps(XmmRegister dst, const Address& src) {
1105 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1106 EmitUint8(0x0F);
1107 EmitUint8(0x57);
1108 EmitOperand(dst, src);
1109 }
1110
1111
xorps(XmmRegister dst,XmmRegister src)1112 void X86Assembler::xorps(XmmRegister dst, XmmRegister src) {
1113 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1114 EmitUint8(0x0F);
1115 EmitUint8(0x57);
1116 EmitXmmRegisterOperand(dst, src);
1117 }
1118
1119
pxor(XmmRegister dst,XmmRegister src)1120 void X86Assembler::pxor(XmmRegister dst, XmmRegister src) {
1121 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1122 EmitUint8(0x66);
1123 EmitUint8(0x0F);
1124 EmitUint8(0xEF);
1125 EmitXmmRegisterOperand(dst, src);
1126 }
1127
1128
andpd(XmmRegister dst,XmmRegister src)1129 void X86Assembler::andpd(XmmRegister dst, XmmRegister src) {
1130 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1131 EmitUint8(0x66);
1132 EmitUint8(0x0F);
1133 EmitUint8(0x54);
1134 EmitXmmRegisterOperand(dst, src);
1135 }
1136
1137
andpd(XmmRegister dst,const Address & src)1138 void X86Assembler::andpd(XmmRegister dst, const Address& src) {
1139 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1140 EmitUint8(0x66);
1141 EmitUint8(0x0F);
1142 EmitUint8(0x54);
1143 EmitOperand(dst, src);
1144 }
1145
1146
andps(XmmRegister dst,XmmRegister src)1147 void X86Assembler::andps(XmmRegister dst, XmmRegister src) {
1148 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1149 EmitUint8(0x0F);
1150 EmitUint8(0x54);
1151 EmitXmmRegisterOperand(dst, src);
1152 }
1153
1154
andps(XmmRegister dst,const Address & src)1155 void X86Assembler::andps(XmmRegister dst, const Address& src) {
1156 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1157 EmitUint8(0x0F);
1158 EmitUint8(0x54);
1159 EmitOperand(dst, src);
1160 }
1161
1162
pand(XmmRegister dst,XmmRegister src)1163 void X86Assembler::pand(XmmRegister dst, XmmRegister src) {
1164 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1165 EmitUint8(0x66);
1166 EmitUint8(0x0F);
1167 EmitUint8(0xDB);
1168 EmitXmmRegisterOperand(dst, src);
1169 }
1170
1171
andnpd(XmmRegister dst,XmmRegister src)1172 void X86Assembler::andnpd(XmmRegister dst, XmmRegister src) {
1173 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1174 EmitUint8(0x66);
1175 EmitUint8(0x0F);
1176 EmitUint8(0x55);
1177 EmitXmmRegisterOperand(dst, src);
1178 }
1179
1180
andnps(XmmRegister dst,XmmRegister src)1181 void X86Assembler::andnps(XmmRegister dst, XmmRegister src) {
1182 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1183 EmitUint8(0x0F);
1184 EmitUint8(0x55);
1185 EmitXmmRegisterOperand(dst, src);
1186 }
1187
1188
pandn(XmmRegister dst,XmmRegister src)1189 void X86Assembler::pandn(XmmRegister dst, XmmRegister src) {
1190 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1191 EmitUint8(0x66);
1192 EmitUint8(0x0F);
1193 EmitUint8(0xDF);
1194 EmitXmmRegisterOperand(dst, src);
1195 }
1196
1197
orpd(XmmRegister dst,XmmRegister src)1198 void X86Assembler::orpd(XmmRegister dst, XmmRegister src) {
1199 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1200 EmitUint8(0x66);
1201 EmitUint8(0x0F);
1202 EmitUint8(0x56);
1203 EmitXmmRegisterOperand(dst, src);
1204 }
1205
1206
orps(XmmRegister dst,XmmRegister src)1207 void X86Assembler::orps(XmmRegister dst, XmmRegister src) {
1208 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1209 EmitUint8(0x0F);
1210 EmitUint8(0x56);
1211 EmitXmmRegisterOperand(dst, src);
1212 }
1213
1214
por(XmmRegister dst,XmmRegister src)1215 void X86Assembler::por(XmmRegister dst, XmmRegister src) {
1216 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1217 EmitUint8(0x66);
1218 EmitUint8(0x0F);
1219 EmitUint8(0xEB);
1220 EmitXmmRegisterOperand(dst, src);
1221 }
1222
1223
pavgb(XmmRegister dst,XmmRegister src)1224 void X86Assembler::pavgb(XmmRegister dst, XmmRegister src) {
1225 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1226 EmitUint8(0x66);
1227 EmitUint8(0x0F);
1228 EmitUint8(0xE0);
1229 EmitXmmRegisterOperand(dst, src);
1230 }
1231
1232
pavgw(XmmRegister dst,XmmRegister src)1233 void X86Assembler::pavgw(XmmRegister dst, XmmRegister src) {
1234 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1235 EmitUint8(0x66);
1236 EmitUint8(0x0F);
1237 EmitUint8(0xE3);
1238 EmitXmmRegisterOperand(dst, src);
1239 }
1240
pminsb(XmmRegister dst,XmmRegister src)1241 void X86Assembler::pminsb(XmmRegister dst, XmmRegister src) {
1242 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1243 EmitUint8(0x66);
1244 EmitUint8(0x0F);
1245 EmitUint8(0x38);
1246 EmitUint8(0x38);
1247 EmitXmmRegisterOperand(dst, src);
1248 }
1249
pmaxsb(XmmRegister dst,XmmRegister src)1250 void X86Assembler::pmaxsb(XmmRegister dst, XmmRegister src) {
1251 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1252 EmitUint8(0x66);
1253 EmitUint8(0x0F);
1254 EmitUint8(0x38);
1255 EmitUint8(0x3C);
1256 EmitXmmRegisterOperand(dst, src);
1257 }
1258
pminsw(XmmRegister dst,XmmRegister src)1259 void X86Assembler::pminsw(XmmRegister dst, XmmRegister src) {
1260 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1261 EmitUint8(0x66);
1262 EmitUint8(0x0F);
1263 EmitUint8(0xEA);
1264 EmitXmmRegisterOperand(dst, src);
1265 }
1266
pmaxsw(XmmRegister dst,XmmRegister src)1267 void X86Assembler::pmaxsw(XmmRegister dst, XmmRegister src) {
1268 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1269 EmitUint8(0x66);
1270 EmitUint8(0x0F);
1271 EmitUint8(0xEE);
1272 EmitXmmRegisterOperand(dst, src);
1273 }
1274
pminsd(XmmRegister dst,XmmRegister src)1275 void X86Assembler::pminsd(XmmRegister dst, XmmRegister src) {
1276 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1277 EmitUint8(0x66);
1278 EmitUint8(0x0F);
1279 EmitUint8(0x38);
1280 EmitUint8(0x39);
1281 EmitXmmRegisterOperand(dst, src);
1282 }
1283
pmaxsd(XmmRegister dst,XmmRegister src)1284 void X86Assembler::pmaxsd(XmmRegister dst, XmmRegister src) {
1285 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1286 EmitUint8(0x66);
1287 EmitUint8(0x0F);
1288 EmitUint8(0x38);
1289 EmitUint8(0x3D);
1290 EmitXmmRegisterOperand(dst, src);
1291 }
1292
pminub(XmmRegister dst,XmmRegister src)1293 void X86Assembler::pminub(XmmRegister dst, XmmRegister src) {
1294 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1295 EmitUint8(0x66);
1296 EmitUint8(0x0F);
1297 EmitUint8(0xDA);
1298 EmitXmmRegisterOperand(dst, src);
1299 }
1300
pmaxub(XmmRegister dst,XmmRegister src)1301 void X86Assembler::pmaxub(XmmRegister dst, XmmRegister src) {
1302 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1303 EmitUint8(0x66);
1304 EmitUint8(0x0F);
1305 EmitUint8(0xDE);
1306 EmitXmmRegisterOperand(dst, src);
1307 }
1308
pminuw(XmmRegister dst,XmmRegister src)1309 void X86Assembler::pminuw(XmmRegister dst, XmmRegister src) {
1310 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1311 EmitUint8(0x66);
1312 EmitUint8(0x0F);
1313 EmitUint8(0x38);
1314 EmitUint8(0x3A);
1315 EmitXmmRegisterOperand(dst, src);
1316 }
1317
pmaxuw(XmmRegister dst,XmmRegister src)1318 void X86Assembler::pmaxuw(XmmRegister dst, XmmRegister src) {
1319 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1320 EmitUint8(0x66);
1321 EmitUint8(0x0F);
1322 EmitUint8(0x38);
1323 EmitUint8(0x3E);
1324 EmitXmmRegisterOperand(dst, src);
1325 }
1326
pminud(XmmRegister dst,XmmRegister src)1327 void X86Assembler::pminud(XmmRegister dst, XmmRegister src) {
1328 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1329 EmitUint8(0x66);
1330 EmitUint8(0x0F);
1331 EmitUint8(0x38);
1332 EmitUint8(0x3B);
1333 EmitXmmRegisterOperand(dst, src);
1334 }
1335
pmaxud(XmmRegister dst,XmmRegister src)1336 void X86Assembler::pmaxud(XmmRegister dst, XmmRegister src) {
1337 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1338 EmitUint8(0x66);
1339 EmitUint8(0x0F);
1340 EmitUint8(0x38);
1341 EmitUint8(0x3F);
1342 EmitXmmRegisterOperand(dst, src);
1343 }
1344
minps(XmmRegister dst,XmmRegister src)1345 void X86Assembler::minps(XmmRegister dst, XmmRegister src) {
1346 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1347 EmitUint8(0x0F);
1348 EmitUint8(0x5D);
1349 EmitXmmRegisterOperand(dst, src);
1350 }
1351
maxps(XmmRegister dst,XmmRegister src)1352 void X86Assembler::maxps(XmmRegister dst, XmmRegister src) {
1353 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1354 EmitUint8(0x0F);
1355 EmitUint8(0x5F);
1356 EmitXmmRegisterOperand(dst, src);
1357 }
1358
minpd(XmmRegister dst,XmmRegister src)1359 void X86Assembler::minpd(XmmRegister dst, XmmRegister src) {
1360 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1361 EmitUint8(0x66);
1362 EmitUint8(0x0F);
1363 EmitUint8(0x5D);
1364 EmitXmmRegisterOperand(dst, src);
1365 }
1366
maxpd(XmmRegister dst,XmmRegister src)1367 void X86Assembler::maxpd(XmmRegister dst, XmmRegister src) {
1368 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1369 EmitUint8(0x66);
1370 EmitUint8(0x0F);
1371 EmitUint8(0x5F);
1372 EmitXmmRegisterOperand(dst, src);
1373 }
1374
pcmpeqb(XmmRegister dst,XmmRegister src)1375 void X86Assembler::pcmpeqb(XmmRegister dst, XmmRegister src) {
1376 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1377 EmitUint8(0x66);
1378 EmitUint8(0x0F);
1379 EmitUint8(0x74);
1380 EmitXmmRegisterOperand(dst, src);
1381 }
1382
1383
pcmpeqw(XmmRegister dst,XmmRegister src)1384 void X86Assembler::pcmpeqw(XmmRegister dst, XmmRegister src) {
1385 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1386 EmitUint8(0x66);
1387 EmitUint8(0x0F);
1388 EmitUint8(0x75);
1389 EmitXmmRegisterOperand(dst, src);
1390 }
1391
1392
pcmpeqd(XmmRegister dst,XmmRegister src)1393 void X86Assembler::pcmpeqd(XmmRegister dst, XmmRegister src) {
1394 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1395 EmitUint8(0x66);
1396 EmitUint8(0x0F);
1397 EmitUint8(0x76);
1398 EmitXmmRegisterOperand(dst, src);
1399 }
1400
1401
pcmpeqq(XmmRegister dst,XmmRegister src)1402 void X86Assembler::pcmpeqq(XmmRegister dst, XmmRegister src) {
1403 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1404 EmitUint8(0x66);
1405 EmitUint8(0x0F);
1406 EmitUint8(0x38);
1407 EmitUint8(0x29);
1408 EmitXmmRegisterOperand(dst, src);
1409 }
1410
1411
pcmpgtb(XmmRegister dst,XmmRegister src)1412 void X86Assembler::pcmpgtb(XmmRegister dst, XmmRegister src) {
1413 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1414 EmitUint8(0x66);
1415 EmitUint8(0x0F);
1416 EmitUint8(0x64);
1417 EmitXmmRegisterOperand(dst, src);
1418 }
1419
1420
pcmpgtw(XmmRegister dst,XmmRegister src)1421 void X86Assembler::pcmpgtw(XmmRegister dst, XmmRegister src) {
1422 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1423 EmitUint8(0x66);
1424 EmitUint8(0x0F);
1425 EmitUint8(0x65);
1426 EmitXmmRegisterOperand(dst, src);
1427 }
1428
1429
pcmpgtd(XmmRegister dst,XmmRegister src)1430 void X86Assembler::pcmpgtd(XmmRegister dst, XmmRegister src) {
1431 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1432 EmitUint8(0x66);
1433 EmitUint8(0x0F);
1434 EmitUint8(0x66);
1435 EmitXmmRegisterOperand(dst, src);
1436 }
1437
1438
pcmpgtq(XmmRegister dst,XmmRegister src)1439 void X86Assembler::pcmpgtq(XmmRegister dst, XmmRegister src) {
1440 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1441 EmitUint8(0x66);
1442 EmitUint8(0x0F);
1443 EmitUint8(0x38);
1444 EmitUint8(0x37);
1445 EmitXmmRegisterOperand(dst, src);
1446 }
1447
1448
shufpd(XmmRegister dst,XmmRegister src,const Immediate & imm)1449 void X86Assembler::shufpd(XmmRegister dst, XmmRegister src, const Immediate& imm) {
1450 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1451 EmitUint8(0x66);
1452 EmitUint8(0x0F);
1453 EmitUint8(0xC6);
1454 EmitXmmRegisterOperand(dst, src);
1455 EmitUint8(imm.value());
1456 }
1457
1458
shufps(XmmRegister dst,XmmRegister src,const Immediate & imm)1459 void X86Assembler::shufps(XmmRegister dst, XmmRegister src, const Immediate& imm) {
1460 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1461 EmitUint8(0x0F);
1462 EmitUint8(0xC6);
1463 EmitXmmRegisterOperand(dst, src);
1464 EmitUint8(imm.value());
1465 }
1466
1467
pshufd(XmmRegister dst,XmmRegister src,const Immediate & imm)1468 void X86Assembler::pshufd(XmmRegister dst, XmmRegister src, const Immediate& imm) {
1469 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1470 EmitUint8(0x66);
1471 EmitUint8(0x0F);
1472 EmitUint8(0x70);
1473 EmitXmmRegisterOperand(dst, src);
1474 EmitUint8(imm.value());
1475 }
1476
1477
punpcklbw(XmmRegister dst,XmmRegister src)1478 void X86Assembler::punpcklbw(XmmRegister dst, XmmRegister src) {
1479 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1480 EmitUint8(0x66);
1481 EmitUint8(0x0F);
1482 EmitUint8(0x60);
1483 EmitXmmRegisterOperand(dst, src);
1484 }
1485
1486
punpcklwd(XmmRegister dst,XmmRegister src)1487 void X86Assembler::punpcklwd(XmmRegister dst, XmmRegister src) {
1488 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1489 EmitUint8(0x66);
1490 EmitUint8(0x0F);
1491 EmitUint8(0x61);
1492 EmitXmmRegisterOperand(dst, src);
1493 }
1494
1495
punpckldq(XmmRegister dst,XmmRegister src)1496 void X86Assembler::punpckldq(XmmRegister dst, XmmRegister src) {
1497 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1498 EmitUint8(0x66);
1499 EmitUint8(0x0F);
1500 EmitUint8(0x62);
1501 EmitXmmRegisterOperand(dst, src);
1502 }
1503
1504
punpcklqdq(XmmRegister dst,XmmRegister src)1505 void X86Assembler::punpcklqdq(XmmRegister dst, XmmRegister src) {
1506 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1507 EmitUint8(0x66);
1508 EmitUint8(0x0F);
1509 EmitUint8(0x6C);
1510 EmitXmmRegisterOperand(dst, src);
1511 }
1512
1513
psllw(XmmRegister reg,const Immediate & shift_count)1514 void X86Assembler::psllw(XmmRegister reg, const Immediate& shift_count) {
1515 DCHECK(shift_count.is_uint8());
1516 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1517 EmitUint8(0x66);
1518 EmitUint8(0x0F);
1519 EmitUint8(0x71);
1520 EmitXmmRegisterOperand(6, reg);
1521 EmitUint8(shift_count.value());
1522 }
1523
1524
pslld(XmmRegister reg,const Immediate & shift_count)1525 void X86Assembler::pslld(XmmRegister reg, const Immediate& shift_count) {
1526 DCHECK(shift_count.is_uint8());
1527 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1528 EmitUint8(0x66);
1529 EmitUint8(0x0F);
1530 EmitUint8(0x72);
1531 EmitXmmRegisterOperand(6, reg);
1532 EmitUint8(shift_count.value());
1533 }
1534
1535
psllq(XmmRegister reg,const Immediate & shift_count)1536 void X86Assembler::psllq(XmmRegister reg, const Immediate& shift_count) {
1537 DCHECK(shift_count.is_uint8());
1538 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1539 EmitUint8(0x66);
1540 EmitUint8(0x0F);
1541 EmitUint8(0x73);
1542 EmitXmmRegisterOperand(6, reg);
1543 EmitUint8(shift_count.value());
1544 }
1545
1546
psraw(XmmRegister reg,const Immediate & shift_count)1547 void X86Assembler::psraw(XmmRegister reg, const Immediate& shift_count) {
1548 DCHECK(shift_count.is_uint8());
1549 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1550 EmitUint8(0x66);
1551 EmitUint8(0x0F);
1552 EmitUint8(0x71);
1553 EmitXmmRegisterOperand(4, reg);
1554 EmitUint8(shift_count.value());
1555 }
1556
1557
psrad(XmmRegister reg,const Immediate & shift_count)1558 void X86Assembler::psrad(XmmRegister reg, const Immediate& shift_count) {
1559 DCHECK(shift_count.is_uint8());
1560 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1561 EmitUint8(0x66);
1562 EmitUint8(0x0F);
1563 EmitUint8(0x72);
1564 EmitXmmRegisterOperand(4, reg);
1565 EmitUint8(shift_count.value());
1566 }
1567
1568
psrlw(XmmRegister reg,const Immediate & shift_count)1569 void X86Assembler::psrlw(XmmRegister reg, const Immediate& shift_count) {
1570 DCHECK(shift_count.is_uint8());
1571 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1572 EmitUint8(0x66);
1573 EmitUint8(0x0F);
1574 EmitUint8(0x71);
1575 EmitXmmRegisterOperand(2, reg);
1576 EmitUint8(shift_count.value());
1577 }
1578
1579
psrld(XmmRegister reg,const Immediate & shift_count)1580 void X86Assembler::psrld(XmmRegister reg, const Immediate& shift_count) {
1581 DCHECK(shift_count.is_uint8());
1582 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1583 EmitUint8(0x66);
1584 EmitUint8(0x0F);
1585 EmitUint8(0x72);
1586 EmitXmmRegisterOperand(2, reg);
1587 EmitUint8(shift_count.value());
1588 }
1589
1590
psrlq(XmmRegister reg,const Immediate & shift_count)1591 void X86Assembler::psrlq(XmmRegister reg, const Immediate& shift_count) {
1592 DCHECK(shift_count.is_uint8());
1593 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1594 EmitUint8(0x66);
1595 EmitUint8(0x0F);
1596 EmitUint8(0x73);
1597 EmitXmmRegisterOperand(2, reg);
1598 EmitUint8(shift_count.value());
1599 }
1600
1601
psrldq(XmmRegister reg,const Immediate & shift_count)1602 void X86Assembler::psrldq(XmmRegister reg, const Immediate& shift_count) {
1603 DCHECK(shift_count.is_uint8());
1604 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1605 EmitUint8(0x66);
1606 EmitUint8(0x0F);
1607 EmitUint8(0x73);
1608 EmitXmmRegisterOperand(3, reg);
1609 EmitUint8(shift_count.value());
1610 }
1611
1612
fldl(const Address & src)1613 void X86Assembler::fldl(const Address& src) {
1614 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1615 EmitUint8(0xDD);
1616 EmitOperand(0, src);
1617 }
1618
1619
fstl(const Address & dst)1620 void X86Assembler::fstl(const Address& dst) {
1621 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1622 EmitUint8(0xDD);
1623 EmitOperand(2, dst);
1624 }
1625
1626
fstpl(const Address & dst)1627 void X86Assembler::fstpl(const Address& dst) {
1628 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1629 EmitUint8(0xDD);
1630 EmitOperand(3, dst);
1631 }
1632
1633
fstsw()1634 void X86Assembler::fstsw() {
1635 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1636 EmitUint8(0x9B);
1637 EmitUint8(0xDF);
1638 EmitUint8(0xE0);
1639 }
1640
1641
fnstcw(const Address & dst)1642 void X86Assembler::fnstcw(const Address& dst) {
1643 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1644 EmitUint8(0xD9);
1645 EmitOperand(7, dst);
1646 }
1647
1648
fldcw(const Address & src)1649 void X86Assembler::fldcw(const Address& src) {
1650 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1651 EmitUint8(0xD9);
1652 EmitOperand(5, src);
1653 }
1654
1655
fistpl(const Address & dst)1656 void X86Assembler::fistpl(const Address& dst) {
1657 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1658 EmitUint8(0xDF);
1659 EmitOperand(7, dst);
1660 }
1661
1662
fistps(const Address & dst)1663 void X86Assembler::fistps(const Address& dst) {
1664 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1665 EmitUint8(0xDB);
1666 EmitOperand(3, dst);
1667 }
1668
1669
fildl(const Address & src)1670 void X86Assembler::fildl(const Address& src) {
1671 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1672 EmitUint8(0xDF);
1673 EmitOperand(5, src);
1674 }
1675
1676
filds(const Address & src)1677 void X86Assembler::filds(const Address& src) {
1678 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1679 EmitUint8(0xDB);
1680 EmitOperand(0, src);
1681 }
1682
1683
fincstp()1684 void X86Assembler::fincstp() {
1685 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1686 EmitUint8(0xD9);
1687 EmitUint8(0xF7);
1688 }
1689
1690
ffree(const Immediate & index)1691 void X86Assembler::ffree(const Immediate& index) {
1692 CHECK_LT(index.value(), 7);
1693 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1694 EmitUint8(0xDD);
1695 EmitUint8(0xC0 + index.value());
1696 }
1697
1698
fsin()1699 void X86Assembler::fsin() {
1700 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1701 EmitUint8(0xD9);
1702 EmitUint8(0xFE);
1703 }
1704
1705
fcos()1706 void X86Assembler::fcos() {
1707 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1708 EmitUint8(0xD9);
1709 EmitUint8(0xFF);
1710 }
1711
1712
fptan()1713 void X86Assembler::fptan() {
1714 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1715 EmitUint8(0xD9);
1716 EmitUint8(0xF2);
1717 }
1718
1719
fucompp()1720 void X86Assembler::fucompp() {
1721 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1722 EmitUint8(0xDA);
1723 EmitUint8(0xE9);
1724 }
1725
1726
fprem()1727 void X86Assembler::fprem() {
1728 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1729 EmitUint8(0xD9);
1730 EmitUint8(0xF8);
1731 }
1732
1733
xchgl(Register dst,Register src)1734 void X86Assembler::xchgl(Register dst, Register src) {
1735 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1736 EmitUint8(0x87);
1737 EmitRegisterOperand(dst, src);
1738 }
1739
1740
xchgl(Register reg,const Address & address)1741 void X86Assembler::xchgl(Register reg, const Address& address) {
1742 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1743 EmitUint8(0x87);
1744 EmitOperand(reg, address);
1745 }
1746
1747
cmpb(const Address & address,const Immediate & imm)1748 void X86Assembler::cmpb(const Address& address, const Immediate& imm) {
1749 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1750 EmitUint8(0x80);
1751 EmitOperand(7, address);
1752 EmitUint8(imm.value() & 0xFF);
1753 }
1754
1755
cmpw(const Address & address,const Immediate & imm)1756 void X86Assembler::cmpw(const Address& address, const Immediate& imm) {
1757 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1758 EmitUint8(0x66);
1759 EmitComplex(7, address, imm);
1760 }
1761
1762
cmpl(Register reg,const Immediate & imm)1763 void X86Assembler::cmpl(Register reg, const Immediate& imm) {
1764 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1765 EmitComplex(7, Operand(reg), imm);
1766 }
1767
1768
cmpl(Register reg0,Register reg1)1769 void X86Assembler::cmpl(Register reg0, Register reg1) {
1770 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1771 EmitUint8(0x3B);
1772 EmitOperand(reg0, Operand(reg1));
1773 }
1774
1775
cmpl(Register reg,const Address & address)1776 void X86Assembler::cmpl(Register reg, const Address& address) {
1777 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1778 EmitUint8(0x3B);
1779 EmitOperand(reg, address);
1780 }
1781
1782
addl(Register dst,Register src)1783 void X86Assembler::addl(Register dst, Register src) {
1784 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1785 EmitUint8(0x03);
1786 EmitRegisterOperand(dst, src);
1787 }
1788
1789
addl(Register reg,const Address & address)1790 void X86Assembler::addl(Register reg, const Address& address) {
1791 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1792 EmitUint8(0x03);
1793 EmitOperand(reg, address);
1794 }
1795
1796
cmpl(const Address & address,Register reg)1797 void X86Assembler::cmpl(const Address& address, Register reg) {
1798 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1799 EmitUint8(0x39);
1800 EmitOperand(reg, address);
1801 }
1802
1803
cmpl(const Address & address,const Immediate & imm)1804 void X86Assembler::cmpl(const Address& address, const Immediate& imm) {
1805 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1806 EmitComplex(7, address, imm);
1807 }
1808
1809
testl(Register reg1,Register reg2)1810 void X86Assembler::testl(Register reg1, Register reg2) {
1811 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1812 EmitUint8(0x85);
1813 EmitRegisterOperand(reg1, reg2);
1814 }
1815
1816
testl(Register reg,const Address & address)1817 void X86Assembler::testl(Register reg, const Address& address) {
1818 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1819 EmitUint8(0x85);
1820 EmitOperand(reg, address);
1821 }
1822
1823
testl(Register reg,const Immediate & immediate)1824 void X86Assembler::testl(Register reg, const Immediate& immediate) {
1825 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1826 // For registers that have a byte variant (EAX, EBX, ECX, and EDX)
1827 // we only test the byte register to keep the encoding short.
1828 if (immediate.is_uint8() && reg < 4) {
1829 // Use zero-extended 8-bit immediate.
1830 if (reg == EAX) {
1831 EmitUint8(0xA8);
1832 } else {
1833 EmitUint8(0xF6);
1834 EmitUint8(0xC0 + reg);
1835 }
1836 EmitUint8(immediate.value() & 0xFF);
1837 } else if (reg == EAX) {
1838 // Use short form if the destination is EAX.
1839 EmitUint8(0xA9);
1840 EmitImmediate(immediate);
1841 } else {
1842 EmitUint8(0xF7);
1843 EmitOperand(0, Operand(reg));
1844 EmitImmediate(immediate);
1845 }
1846 }
1847
1848
testb(const Address & dst,const Immediate & imm)1849 void X86Assembler::testb(const Address& dst, const Immediate& imm) {
1850 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1851 EmitUint8(0xF6);
1852 EmitOperand(EAX, dst);
1853 CHECK(imm.is_int8());
1854 EmitUint8(imm.value() & 0xFF);
1855 }
1856
1857
testl(const Address & dst,const Immediate & imm)1858 void X86Assembler::testl(const Address& dst, const Immediate& imm) {
1859 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1860 EmitUint8(0xF7);
1861 EmitOperand(0, dst);
1862 EmitImmediate(imm);
1863 }
1864
1865
andl(Register dst,Register src)1866 void X86Assembler::andl(Register dst, Register src) {
1867 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1868 EmitUint8(0x23);
1869 EmitOperand(dst, Operand(src));
1870 }
1871
1872
andl(Register reg,const Address & address)1873 void X86Assembler::andl(Register reg, const Address& address) {
1874 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1875 EmitUint8(0x23);
1876 EmitOperand(reg, address);
1877 }
1878
1879
andl(Register dst,const Immediate & imm)1880 void X86Assembler::andl(Register dst, const Immediate& imm) {
1881 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1882 EmitComplex(4, Operand(dst), imm);
1883 }
1884
1885
orl(Register dst,Register src)1886 void X86Assembler::orl(Register dst, Register src) {
1887 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1888 EmitUint8(0x0B);
1889 EmitOperand(dst, Operand(src));
1890 }
1891
1892
orl(Register reg,const Address & address)1893 void X86Assembler::orl(Register reg, const Address& address) {
1894 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1895 EmitUint8(0x0B);
1896 EmitOperand(reg, address);
1897 }
1898
1899
orl(Register dst,const Immediate & imm)1900 void X86Assembler::orl(Register dst, const Immediate& imm) {
1901 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1902 EmitComplex(1, Operand(dst), imm);
1903 }
1904
1905
xorl(Register dst,Register src)1906 void X86Assembler::xorl(Register dst, Register src) {
1907 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1908 EmitUint8(0x33);
1909 EmitOperand(dst, Operand(src));
1910 }
1911
1912
xorl(Register reg,const Address & address)1913 void X86Assembler::xorl(Register reg, const Address& address) {
1914 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1915 EmitUint8(0x33);
1916 EmitOperand(reg, address);
1917 }
1918
1919
xorl(Register dst,const Immediate & imm)1920 void X86Assembler::xorl(Register dst, const Immediate& imm) {
1921 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1922 EmitComplex(6, Operand(dst), imm);
1923 }
1924
1925
addl(Register reg,const Immediate & imm)1926 void X86Assembler::addl(Register reg, const Immediate& imm) {
1927 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1928 EmitComplex(0, Operand(reg), imm);
1929 }
1930
1931
addl(const Address & address,Register reg)1932 void X86Assembler::addl(const Address& address, Register reg) {
1933 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1934 EmitUint8(0x01);
1935 EmitOperand(reg, address);
1936 }
1937
1938
addl(const Address & address,const Immediate & imm)1939 void X86Assembler::addl(const Address& address, const Immediate& imm) {
1940 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1941 EmitComplex(0, address, imm);
1942 }
1943
1944
adcl(Register reg,const Immediate & imm)1945 void X86Assembler::adcl(Register reg, const Immediate& imm) {
1946 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1947 EmitComplex(2, Operand(reg), imm);
1948 }
1949
1950
adcl(Register dst,Register src)1951 void X86Assembler::adcl(Register dst, Register src) {
1952 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1953 EmitUint8(0x13);
1954 EmitOperand(dst, Operand(src));
1955 }
1956
1957
adcl(Register dst,const Address & address)1958 void X86Assembler::adcl(Register dst, const Address& address) {
1959 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1960 EmitUint8(0x13);
1961 EmitOperand(dst, address);
1962 }
1963
1964
subl(Register dst,Register src)1965 void X86Assembler::subl(Register dst, Register src) {
1966 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1967 EmitUint8(0x2B);
1968 EmitOperand(dst, Operand(src));
1969 }
1970
1971
subl(Register reg,const Immediate & imm)1972 void X86Assembler::subl(Register reg, const Immediate& imm) {
1973 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1974 EmitComplex(5, Operand(reg), imm);
1975 }
1976
1977
subl(Register reg,const Address & address)1978 void X86Assembler::subl(Register reg, const Address& address) {
1979 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1980 EmitUint8(0x2B);
1981 EmitOperand(reg, address);
1982 }
1983
1984
subl(const Address & address,Register reg)1985 void X86Assembler::subl(const Address& address, Register reg) {
1986 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1987 EmitUint8(0x29);
1988 EmitOperand(reg, address);
1989 }
1990
1991
cdq()1992 void X86Assembler::cdq() {
1993 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1994 EmitUint8(0x99);
1995 }
1996
1997
idivl(Register reg)1998 void X86Assembler::idivl(Register reg) {
1999 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2000 EmitUint8(0xF7);
2001 EmitUint8(0xF8 | reg);
2002 }
2003
2004
imull(Register dst,Register src)2005 void X86Assembler::imull(Register dst, Register src) {
2006 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2007 EmitUint8(0x0F);
2008 EmitUint8(0xAF);
2009 EmitOperand(dst, Operand(src));
2010 }
2011
2012
imull(Register dst,Register src,const Immediate & imm)2013 void X86Assembler::imull(Register dst, Register src, const Immediate& imm) {
2014 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2015 // See whether imm can be represented as a sign-extended 8bit value.
2016 int32_t v32 = static_cast<int32_t>(imm.value());
2017 if (IsInt<8>(v32)) {
2018 // Sign-extension works.
2019 EmitUint8(0x6B);
2020 EmitOperand(dst, Operand(src));
2021 EmitUint8(static_cast<uint8_t>(v32 & 0xFF));
2022 } else {
2023 // Not representable, use full immediate.
2024 EmitUint8(0x69);
2025 EmitOperand(dst, Operand(src));
2026 EmitImmediate(imm);
2027 }
2028 }
2029
2030
imull(Register reg,const Immediate & imm)2031 void X86Assembler::imull(Register reg, const Immediate& imm) {
2032 imull(reg, reg, imm);
2033 }
2034
2035
imull(Register reg,const Address & address)2036 void X86Assembler::imull(Register reg, const Address& address) {
2037 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2038 EmitUint8(0x0F);
2039 EmitUint8(0xAF);
2040 EmitOperand(reg, address);
2041 }
2042
2043
imull(Register reg)2044 void X86Assembler::imull(Register reg) {
2045 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2046 EmitUint8(0xF7);
2047 EmitOperand(5, Operand(reg));
2048 }
2049
2050
imull(const Address & address)2051 void X86Assembler::imull(const Address& address) {
2052 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2053 EmitUint8(0xF7);
2054 EmitOperand(5, address);
2055 }
2056
2057
mull(Register reg)2058 void X86Assembler::mull(Register reg) {
2059 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2060 EmitUint8(0xF7);
2061 EmitOperand(4, Operand(reg));
2062 }
2063
2064
mull(const Address & address)2065 void X86Assembler::mull(const Address& address) {
2066 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2067 EmitUint8(0xF7);
2068 EmitOperand(4, address);
2069 }
2070
2071
sbbl(Register dst,Register src)2072 void X86Assembler::sbbl(Register dst, Register src) {
2073 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2074 EmitUint8(0x1B);
2075 EmitOperand(dst, Operand(src));
2076 }
2077
2078
sbbl(Register reg,const Immediate & imm)2079 void X86Assembler::sbbl(Register reg, const Immediate& imm) {
2080 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2081 EmitComplex(3, Operand(reg), imm);
2082 }
2083
2084
sbbl(Register dst,const Address & address)2085 void X86Assembler::sbbl(Register dst, const Address& address) {
2086 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2087 EmitUint8(0x1B);
2088 EmitOperand(dst, address);
2089 }
2090
2091
sbbl(const Address & address,Register src)2092 void X86Assembler::sbbl(const Address& address, Register src) {
2093 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2094 EmitUint8(0x19);
2095 EmitOperand(src, address);
2096 }
2097
2098
incl(Register reg)2099 void X86Assembler::incl(Register reg) {
2100 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2101 EmitUint8(0x40 + reg);
2102 }
2103
2104
incl(const Address & address)2105 void X86Assembler::incl(const Address& address) {
2106 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2107 EmitUint8(0xFF);
2108 EmitOperand(0, address);
2109 }
2110
2111
decl(Register reg)2112 void X86Assembler::decl(Register reg) {
2113 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2114 EmitUint8(0x48 + reg);
2115 }
2116
2117
decl(const Address & address)2118 void X86Assembler::decl(const Address& address) {
2119 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2120 EmitUint8(0xFF);
2121 EmitOperand(1, address);
2122 }
2123
2124
shll(Register reg,const Immediate & imm)2125 void X86Assembler::shll(Register reg, const Immediate& imm) {
2126 EmitGenericShift(4, Operand(reg), imm);
2127 }
2128
2129
shll(Register operand,Register shifter)2130 void X86Assembler::shll(Register operand, Register shifter) {
2131 EmitGenericShift(4, Operand(operand), shifter);
2132 }
2133
2134
shll(const Address & address,const Immediate & imm)2135 void X86Assembler::shll(const Address& address, const Immediate& imm) {
2136 EmitGenericShift(4, address, imm);
2137 }
2138
2139
shll(const Address & address,Register shifter)2140 void X86Assembler::shll(const Address& address, Register shifter) {
2141 EmitGenericShift(4, address, shifter);
2142 }
2143
2144
shrl(Register reg,const Immediate & imm)2145 void X86Assembler::shrl(Register reg, const Immediate& imm) {
2146 EmitGenericShift(5, Operand(reg), imm);
2147 }
2148
2149
shrl(Register operand,Register shifter)2150 void X86Assembler::shrl(Register operand, Register shifter) {
2151 EmitGenericShift(5, Operand(operand), shifter);
2152 }
2153
2154
shrl(const Address & address,const Immediate & imm)2155 void X86Assembler::shrl(const Address& address, const Immediate& imm) {
2156 EmitGenericShift(5, address, imm);
2157 }
2158
2159
shrl(const Address & address,Register shifter)2160 void X86Assembler::shrl(const Address& address, Register shifter) {
2161 EmitGenericShift(5, address, shifter);
2162 }
2163
2164
sarl(Register reg,const Immediate & imm)2165 void X86Assembler::sarl(Register reg, const Immediate& imm) {
2166 EmitGenericShift(7, Operand(reg), imm);
2167 }
2168
2169
sarl(Register operand,Register shifter)2170 void X86Assembler::sarl(Register operand, Register shifter) {
2171 EmitGenericShift(7, Operand(operand), shifter);
2172 }
2173
2174
sarl(const Address & address,const Immediate & imm)2175 void X86Assembler::sarl(const Address& address, const Immediate& imm) {
2176 EmitGenericShift(7, address, imm);
2177 }
2178
2179
sarl(const Address & address,Register shifter)2180 void X86Assembler::sarl(const Address& address, Register shifter) {
2181 EmitGenericShift(7, address, shifter);
2182 }
2183
2184
shld(Register dst,Register src,Register shifter)2185 void X86Assembler::shld(Register dst, Register src, Register shifter) {
2186 DCHECK_EQ(ECX, shifter);
2187 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2188 EmitUint8(0x0F);
2189 EmitUint8(0xA5);
2190 EmitRegisterOperand(src, dst);
2191 }
2192
2193
shld(Register dst,Register src,const Immediate & imm)2194 void X86Assembler::shld(Register dst, Register src, const Immediate& imm) {
2195 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2196 EmitUint8(0x0F);
2197 EmitUint8(0xA4);
2198 EmitRegisterOperand(src, dst);
2199 EmitUint8(imm.value() & 0xFF);
2200 }
2201
2202
shrd(Register dst,Register src,Register shifter)2203 void X86Assembler::shrd(Register dst, Register src, Register shifter) {
2204 DCHECK_EQ(ECX, shifter);
2205 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2206 EmitUint8(0x0F);
2207 EmitUint8(0xAD);
2208 EmitRegisterOperand(src, dst);
2209 }
2210
2211
shrd(Register dst,Register src,const Immediate & imm)2212 void X86Assembler::shrd(Register dst, Register src, const Immediate& imm) {
2213 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2214 EmitUint8(0x0F);
2215 EmitUint8(0xAC);
2216 EmitRegisterOperand(src, dst);
2217 EmitUint8(imm.value() & 0xFF);
2218 }
2219
2220
roll(Register reg,const Immediate & imm)2221 void X86Assembler::roll(Register reg, const Immediate& imm) {
2222 EmitGenericShift(0, Operand(reg), imm);
2223 }
2224
2225
roll(Register operand,Register shifter)2226 void X86Assembler::roll(Register operand, Register shifter) {
2227 EmitGenericShift(0, Operand(operand), shifter);
2228 }
2229
2230
rorl(Register reg,const Immediate & imm)2231 void X86Assembler::rorl(Register reg, const Immediate& imm) {
2232 EmitGenericShift(1, Operand(reg), imm);
2233 }
2234
2235
rorl(Register operand,Register shifter)2236 void X86Assembler::rorl(Register operand, Register shifter) {
2237 EmitGenericShift(1, Operand(operand), shifter);
2238 }
2239
2240
negl(Register reg)2241 void X86Assembler::negl(Register reg) {
2242 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2243 EmitUint8(0xF7);
2244 EmitOperand(3, Operand(reg));
2245 }
2246
2247
notl(Register reg)2248 void X86Assembler::notl(Register reg) {
2249 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2250 EmitUint8(0xF7);
2251 EmitUint8(0xD0 | reg);
2252 }
2253
2254
enter(const Immediate & imm)2255 void X86Assembler::enter(const Immediate& imm) {
2256 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2257 EmitUint8(0xC8);
2258 CHECK(imm.is_uint16());
2259 EmitUint8(imm.value() & 0xFF);
2260 EmitUint8((imm.value() >> 8) & 0xFF);
2261 EmitUint8(0x00);
2262 }
2263
2264
leave()2265 void X86Assembler::leave() {
2266 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2267 EmitUint8(0xC9);
2268 }
2269
2270
ret()2271 void X86Assembler::ret() {
2272 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2273 EmitUint8(0xC3);
2274 }
2275
2276
ret(const Immediate & imm)2277 void X86Assembler::ret(const Immediate& imm) {
2278 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2279 EmitUint8(0xC2);
2280 CHECK(imm.is_uint16());
2281 EmitUint8(imm.value() & 0xFF);
2282 EmitUint8((imm.value() >> 8) & 0xFF);
2283 }
2284
2285
2286
nop()2287 void X86Assembler::nop() {
2288 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2289 EmitUint8(0x90);
2290 }
2291
2292
int3()2293 void X86Assembler::int3() {
2294 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2295 EmitUint8(0xCC);
2296 }
2297
2298
hlt()2299 void X86Assembler::hlt() {
2300 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2301 EmitUint8(0xF4);
2302 }
2303
2304
j(Condition condition,Label * label)2305 void X86Assembler::j(Condition condition, Label* label) {
2306 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2307 if (label->IsBound()) {
2308 static const int kShortSize = 2;
2309 static const int kLongSize = 6;
2310 int offset = label->Position() - buffer_.Size();
2311 CHECK_LE(offset, 0);
2312 if (IsInt<8>(offset - kShortSize)) {
2313 EmitUint8(0x70 + condition);
2314 EmitUint8((offset - kShortSize) & 0xFF);
2315 } else {
2316 EmitUint8(0x0F);
2317 EmitUint8(0x80 + condition);
2318 EmitInt32(offset - kLongSize);
2319 }
2320 } else {
2321 EmitUint8(0x0F);
2322 EmitUint8(0x80 + condition);
2323 EmitLabelLink(label);
2324 }
2325 }
2326
2327
j(Condition condition,NearLabel * label)2328 void X86Assembler::j(Condition condition, NearLabel* label) {
2329 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2330 if (label->IsBound()) {
2331 static const int kShortSize = 2;
2332 int offset = label->Position() - buffer_.Size();
2333 CHECK_LE(offset, 0);
2334 CHECK(IsInt<8>(offset - kShortSize));
2335 EmitUint8(0x70 + condition);
2336 EmitUint8((offset - kShortSize) & 0xFF);
2337 } else {
2338 EmitUint8(0x70 + condition);
2339 EmitLabelLink(label);
2340 }
2341 }
2342
2343
jecxz(NearLabel * label)2344 void X86Assembler::jecxz(NearLabel* label) {
2345 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2346 if (label->IsBound()) {
2347 static const int kShortSize = 2;
2348 int offset = label->Position() - buffer_.Size();
2349 CHECK_LE(offset, 0);
2350 CHECK(IsInt<8>(offset - kShortSize));
2351 EmitUint8(0xE3);
2352 EmitUint8((offset - kShortSize) & 0xFF);
2353 } else {
2354 EmitUint8(0xE3);
2355 EmitLabelLink(label);
2356 }
2357 }
2358
2359
jmp(Register reg)2360 void X86Assembler::jmp(Register reg) {
2361 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2362 EmitUint8(0xFF);
2363 EmitRegisterOperand(4, reg);
2364 }
2365
jmp(const Address & address)2366 void X86Assembler::jmp(const Address& address) {
2367 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2368 EmitUint8(0xFF);
2369 EmitOperand(4, address);
2370 }
2371
jmp(Label * label)2372 void X86Assembler::jmp(Label* label) {
2373 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2374 if (label->IsBound()) {
2375 static const int kShortSize = 2;
2376 static const int kLongSize = 5;
2377 int offset = label->Position() - buffer_.Size();
2378 CHECK_LE(offset, 0);
2379 if (IsInt<8>(offset - kShortSize)) {
2380 EmitUint8(0xEB);
2381 EmitUint8((offset - kShortSize) & 0xFF);
2382 } else {
2383 EmitUint8(0xE9);
2384 EmitInt32(offset - kLongSize);
2385 }
2386 } else {
2387 EmitUint8(0xE9);
2388 EmitLabelLink(label);
2389 }
2390 }
2391
2392
jmp(NearLabel * label)2393 void X86Assembler::jmp(NearLabel* label) {
2394 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2395 if (label->IsBound()) {
2396 static const int kShortSize = 2;
2397 int offset = label->Position() - buffer_.Size();
2398 CHECK_LE(offset, 0);
2399 CHECK(IsInt<8>(offset - kShortSize));
2400 EmitUint8(0xEB);
2401 EmitUint8((offset - kShortSize) & 0xFF);
2402 } else {
2403 EmitUint8(0xEB);
2404 EmitLabelLink(label);
2405 }
2406 }
2407
2408
repne_scasb()2409 void X86Assembler::repne_scasb() {
2410 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2411 EmitUint8(0xF2);
2412 EmitUint8(0xAE);
2413 }
2414
2415
repne_scasw()2416 void X86Assembler::repne_scasw() {
2417 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2418 EmitUint8(0x66);
2419 EmitUint8(0xF2);
2420 EmitUint8(0xAF);
2421 }
2422
2423
repe_cmpsb()2424 void X86Assembler::repe_cmpsb() {
2425 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2426 EmitUint8(0xF2);
2427 EmitUint8(0xA6);
2428 }
2429
2430
repe_cmpsw()2431 void X86Assembler::repe_cmpsw() {
2432 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2433 EmitUint8(0x66);
2434 EmitUint8(0xF3);
2435 EmitUint8(0xA7);
2436 }
2437
2438
repe_cmpsl()2439 void X86Assembler::repe_cmpsl() {
2440 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2441 EmitUint8(0xF3);
2442 EmitUint8(0xA7);
2443 }
2444
2445
rep_movsb()2446 void X86Assembler::rep_movsb() {
2447 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2448 EmitUint8(0xF3);
2449 EmitUint8(0xA4);
2450 }
2451
2452
rep_movsw()2453 void X86Assembler::rep_movsw() {
2454 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2455 EmitUint8(0x66);
2456 EmitUint8(0xF3);
2457 EmitUint8(0xA5);
2458 }
2459
2460
lock()2461 X86Assembler* X86Assembler::lock() {
2462 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2463 EmitUint8(0xF0);
2464 return this;
2465 }
2466
2467
cmpxchgl(const Address & address,Register reg)2468 void X86Assembler::cmpxchgl(const Address& address, Register reg) {
2469 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2470 EmitUint8(0x0F);
2471 EmitUint8(0xB1);
2472 EmitOperand(reg, address);
2473 }
2474
2475
cmpxchg8b(const Address & address)2476 void X86Assembler::cmpxchg8b(const Address& address) {
2477 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2478 EmitUint8(0x0F);
2479 EmitUint8(0xC7);
2480 EmitOperand(1, address);
2481 }
2482
2483
mfence()2484 void X86Assembler::mfence() {
2485 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2486 EmitUint8(0x0F);
2487 EmitUint8(0xAE);
2488 EmitUint8(0xF0);
2489 }
2490
fs()2491 X86Assembler* X86Assembler::fs() {
2492 // TODO: fs is a prefix and not an instruction
2493 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2494 EmitUint8(0x64);
2495 return this;
2496 }
2497
gs()2498 X86Assembler* X86Assembler::gs() {
2499 // TODO: fs is a prefix and not an instruction
2500 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2501 EmitUint8(0x65);
2502 return this;
2503 }
2504
AddImmediate(Register reg,const Immediate & imm)2505 void X86Assembler::AddImmediate(Register reg, const Immediate& imm) {
2506 int value = imm.value();
2507 if (value > 0) {
2508 if (value == 1) {
2509 incl(reg);
2510 } else if (value != 0) {
2511 addl(reg, imm);
2512 }
2513 } else if (value < 0) {
2514 value = -value;
2515 if (value == 1) {
2516 decl(reg);
2517 } else if (value != 0) {
2518 subl(reg, Immediate(value));
2519 }
2520 }
2521 }
2522
2523
LoadLongConstant(XmmRegister dst,int64_t value)2524 void X86Assembler::LoadLongConstant(XmmRegister dst, int64_t value) {
2525 // TODO: Need to have a code constants table.
2526 pushl(Immediate(High32Bits(value)));
2527 pushl(Immediate(Low32Bits(value)));
2528 movsd(dst, Address(ESP, 0));
2529 addl(ESP, Immediate(2 * sizeof(int32_t)));
2530 }
2531
2532
LoadDoubleConstant(XmmRegister dst,double value)2533 void X86Assembler::LoadDoubleConstant(XmmRegister dst, double value) {
2534 // TODO: Need to have a code constants table.
2535 int64_t constant = bit_cast<int64_t, double>(value);
2536 LoadLongConstant(dst, constant);
2537 }
2538
2539
Align(int alignment,int offset)2540 void X86Assembler::Align(int alignment, int offset) {
2541 CHECK(IsPowerOfTwo(alignment));
2542 // Emit nop instruction until the real position is aligned.
2543 while (((offset + buffer_.GetPosition()) & (alignment-1)) != 0) {
2544 nop();
2545 }
2546 }
2547
2548
Bind(Label * label)2549 void X86Assembler::Bind(Label* label) {
2550 int bound = buffer_.Size();
2551 CHECK(!label->IsBound()); // Labels can only be bound once.
2552 while (label->IsLinked()) {
2553 int position = label->LinkPosition();
2554 int next = buffer_.Load<int32_t>(position);
2555 buffer_.Store<int32_t>(position, bound - (position + 4));
2556 label->position_ = next;
2557 }
2558 label->BindTo(bound);
2559 }
2560
2561
Bind(NearLabel * label)2562 void X86Assembler::Bind(NearLabel* label) {
2563 int bound = buffer_.Size();
2564 CHECK(!label->IsBound()); // Labels can only be bound once.
2565 while (label->IsLinked()) {
2566 int position = label->LinkPosition();
2567 uint8_t delta = buffer_.Load<uint8_t>(position);
2568 int offset = bound - (position + 1);
2569 CHECK(IsInt<8>(offset));
2570 buffer_.Store<int8_t>(position, offset);
2571 label->position_ = delta != 0u ? label->position_ - delta : 0;
2572 }
2573 label->BindTo(bound);
2574 }
2575
2576
EmitOperand(int reg_or_opcode,const Operand & operand)2577 void X86Assembler::EmitOperand(int reg_or_opcode, const Operand& operand) {
2578 CHECK_GE(reg_or_opcode, 0);
2579 CHECK_LT(reg_or_opcode, 8);
2580 const int length = operand.length_;
2581 CHECK_GT(length, 0);
2582 // Emit the ModRM byte updated with the given reg value.
2583 CHECK_EQ(operand.encoding_[0] & 0x38, 0);
2584 EmitUint8(operand.encoding_[0] + (reg_or_opcode << 3));
2585 // Emit the rest of the encoded operand.
2586 for (int i = 1; i < length; i++) {
2587 EmitUint8(operand.encoding_[i]);
2588 }
2589 AssemblerFixup* fixup = operand.GetFixup();
2590 if (fixup != nullptr) {
2591 EmitFixup(fixup);
2592 }
2593 }
2594
2595
EmitImmediate(const Immediate & imm)2596 void X86Assembler::EmitImmediate(const Immediate& imm) {
2597 EmitInt32(imm.value());
2598 }
2599
2600
EmitComplex(int reg_or_opcode,const Operand & operand,const Immediate & immediate)2601 void X86Assembler::EmitComplex(int reg_or_opcode,
2602 const Operand& operand,
2603 const Immediate& immediate) {
2604 CHECK_GE(reg_or_opcode, 0);
2605 CHECK_LT(reg_or_opcode, 8);
2606 if (immediate.is_int8()) {
2607 // Use sign-extended 8-bit immediate.
2608 EmitUint8(0x83);
2609 EmitOperand(reg_or_opcode, operand);
2610 EmitUint8(immediate.value() & 0xFF);
2611 } else if (operand.IsRegister(EAX)) {
2612 // Use short form if the destination is eax.
2613 EmitUint8(0x05 + (reg_or_opcode << 3));
2614 EmitImmediate(immediate);
2615 } else {
2616 EmitUint8(0x81);
2617 EmitOperand(reg_or_opcode, operand);
2618 EmitImmediate(immediate);
2619 }
2620 }
2621
2622
EmitLabel(Label * label,int instruction_size)2623 void X86Assembler::EmitLabel(Label* label, int instruction_size) {
2624 if (label->IsBound()) {
2625 int offset = label->Position() - buffer_.Size();
2626 CHECK_LE(offset, 0);
2627 EmitInt32(offset - instruction_size);
2628 } else {
2629 EmitLabelLink(label);
2630 }
2631 }
2632
2633
EmitLabelLink(Label * label)2634 void X86Assembler::EmitLabelLink(Label* label) {
2635 CHECK(!label->IsBound());
2636 int position = buffer_.Size();
2637 EmitInt32(label->position_);
2638 label->LinkTo(position);
2639 }
2640
2641
EmitLabelLink(NearLabel * label)2642 void X86Assembler::EmitLabelLink(NearLabel* label) {
2643 CHECK(!label->IsBound());
2644 int position = buffer_.Size();
2645 if (label->IsLinked()) {
2646 // Save the delta in the byte that we have to play with.
2647 uint32_t delta = position - label->LinkPosition();
2648 CHECK(IsUint<8>(delta));
2649 EmitUint8(delta & 0xFF);
2650 } else {
2651 EmitUint8(0);
2652 }
2653 label->LinkTo(position);
2654 }
2655
2656
EmitGenericShift(int reg_or_opcode,const Operand & operand,const Immediate & imm)2657 void X86Assembler::EmitGenericShift(int reg_or_opcode,
2658 const Operand& operand,
2659 const Immediate& imm) {
2660 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2661 CHECK(imm.is_int8());
2662 if (imm.value() == 1) {
2663 EmitUint8(0xD1);
2664 EmitOperand(reg_or_opcode, operand);
2665 } else {
2666 EmitUint8(0xC1);
2667 EmitOperand(reg_or_opcode, operand);
2668 EmitUint8(imm.value() & 0xFF);
2669 }
2670 }
2671
2672
EmitGenericShift(int reg_or_opcode,const Operand & operand,Register shifter)2673 void X86Assembler::EmitGenericShift(int reg_or_opcode,
2674 const Operand& operand,
2675 Register shifter) {
2676 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2677 CHECK_EQ(shifter, ECX);
2678 EmitUint8(0xD3);
2679 EmitOperand(reg_or_opcode, operand);
2680 }
2681
AddConstantArea()2682 void X86Assembler::AddConstantArea() {
2683 ArrayRef<const int32_t> area = constant_area_.GetBuffer();
2684 // Generate the data for the literal area.
2685 for (size_t i = 0, e = area.size(); i < e; i++) {
2686 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2687 EmitInt32(area[i]);
2688 }
2689 }
2690
AppendInt32(int32_t v)2691 size_t ConstantArea::AppendInt32(int32_t v) {
2692 size_t result = buffer_.size() * elem_size_;
2693 buffer_.push_back(v);
2694 return result;
2695 }
2696
AddInt32(int32_t v)2697 size_t ConstantArea::AddInt32(int32_t v) {
2698 for (size_t i = 0, e = buffer_.size(); i < e; i++) {
2699 if (v == buffer_[i]) {
2700 return i * elem_size_;
2701 }
2702 }
2703
2704 // Didn't match anything.
2705 return AppendInt32(v);
2706 }
2707
AddInt64(int64_t v)2708 size_t ConstantArea::AddInt64(int64_t v) {
2709 int32_t v_low = Low32Bits(v);
2710 int32_t v_high = High32Bits(v);
2711 if (buffer_.size() > 1) {
2712 // Ensure we don't pass the end of the buffer.
2713 for (size_t i = 0, e = buffer_.size() - 1; i < e; i++) {
2714 if (v_low == buffer_[i] && v_high == buffer_[i + 1]) {
2715 return i * elem_size_;
2716 }
2717 }
2718 }
2719
2720 // Didn't match anything.
2721 size_t result = buffer_.size() * elem_size_;
2722 buffer_.push_back(v_low);
2723 buffer_.push_back(v_high);
2724 return result;
2725 }
2726
AddDouble(double v)2727 size_t ConstantArea::AddDouble(double v) {
2728 // Treat the value as a 64-bit integer value.
2729 return AddInt64(bit_cast<int64_t, double>(v));
2730 }
2731
AddFloat(float v)2732 size_t ConstantArea::AddFloat(float v) {
2733 // Treat the value as a 32-bit integer value.
2734 return AddInt32(bit_cast<int32_t, float>(v));
2735 }
2736
2737 } // namespace x86
2738 } // namespace art
2739