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1 /****************************************************************************
2  ****************************************************************************
3  ***
4  ***   This header was automatically generated from a Linux kernel header
5  ***   of the same name, to make information necessary for userspace to
6  ***   call into the kernel available to libc.  It contains only constants,
7  ***   structures, and macros generated from the original header, and thus,
8  ***   contains no copyrightable information.
9  ***
10  ***   To edit the content of this header, modify the corresponding
11  ***   source file (e.g. under external/kernel-headers/original/) then
12  ***   run bionic/libc/kernel/tools/update_all.py
13  ***
14  ***   Any manual change here will be lost the next time this script will
15  ***   be run. You've been warned!
16  ***
17  ****************************************************************************
18  ****************************************************************************/
19 #ifndef _I810_DRM_H_
20 #define _I810_DRM_H_
21 #include "drm.h"
22 #ifdef __cplusplus
23 #endif
24 #ifndef _I810_DEFINES_
25 #define _I810_DEFINES_
26 #define I810_DMA_BUF_ORDER 12
27 #define I810_DMA_BUF_SZ (1 << I810_DMA_BUF_ORDER)
28 #define I810_DMA_BUF_NR 256
29 #define I810_NR_SAREA_CLIPRECTS 8
30 #define I810_NR_TEX_REGIONS 64
31 #define I810_LOG_MIN_TEX_REGION_SIZE 16
32 #endif
33 #define I810_UPLOAD_TEX0IMAGE 0x1
34 #define I810_UPLOAD_TEX1IMAGE 0x2
35 #define I810_UPLOAD_CTX 0x4
36 #define I810_UPLOAD_BUFFERS 0x8
37 #define I810_UPLOAD_TEX0 0x10
38 #define I810_UPLOAD_TEX1 0x20
39 #define I810_UPLOAD_CLIPRECTS 0x40
40 #define I810_DESTREG_DI0 0
41 #define I810_DESTREG_DI1 1
42 #define I810_DESTREG_DV0 2
43 #define I810_DESTREG_DV1 3
44 #define I810_DESTREG_DR0 4
45 #define I810_DESTREG_DR1 5
46 #define I810_DESTREG_DR2 6
47 #define I810_DESTREG_DR3 7
48 #define I810_DESTREG_DR4 8
49 #define I810_DEST_SETUP_SIZE 10
50 #define I810_CTXREG_CF0 0
51 #define I810_CTXREG_CF1 1
52 #define I810_CTXREG_ST0 2
53 #define I810_CTXREG_ST1 3
54 #define I810_CTXREG_VF 4
55 #define I810_CTXREG_MT 5
56 #define I810_CTXREG_MC0 6
57 #define I810_CTXREG_MC1 7
58 #define I810_CTXREG_MC2 8
59 #define I810_CTXREG_MA0 9
60 #define I810_CTXREG_MA1 10
61 #define I810_CTXREG_MA2 11
62 #define I810_CTXREG_SDM 12
63 #define I810_CTXREG_FOG 13
64 #define I810_CTXREG_B1 14
65 #define I810_CTXREG_B2 15
66 #define I810_CTXREG_LCS 16
67 #define I810_CTXREG_PV 17
68 #define I810_CTXREG_ZA 18
69 #define I810_CTXREG_AA 19
70 #define I810_CTX_SETUP_SIZE 20
71 #define I810_TEXREG_MI0 0
72 #define I810_TEXREG_MI1 1
73 #define I810_TEXREG_MI2 2
74 #define I810_TEXREG_MI3 3
75 #define I810_TEXREG_MF 4
76 #define I810_TEXREG_MLC 5
77 #define I810_TEXREG_MLL 6
78 #define I810_TEXREG_MCS 7
79 #define I810_TEX_SETUP_SIZE 8
80 #define I810_FRONT 0x1
81 #define I810_BACK 0x2
82 #define I810_DEPTH 0x4
83 typedef enum _drm_i810_init_func {
84   I810_INIT_DMA = 0x01,
85   I810_CLEANUP_DMA = 0x02,
86   I810_INIT_DMA_1_4 = 0x03
87 } drm_i810_init_func_t;
88 typedef struct _drm_i810_init {
89   drm_i810_init_func_t func;
90   unsigned int mmio_offset;
91   unsigned int buffers_offset;
92   int sarea_priv_offset;
93   unsigned int ring_start;
94   unsigned int ring_end;
95   unsigned int ring_size;
96   unsigned int front_offset;
97   unsigned int back_offset;
98   unsigned int depth_offset;
99   unsigned int overlay_offset;
100   unsigned int overlay_physical;
101   unsigned int w;
102   unsigned int h;
103   unsigned int pitch;
104   unsigned int pitch_bits;
105 } drm_i810_init_t;
106 typedef struct _drm_i810_pre12_init {
107   drm_i810_init_func_t func;
108   unsigned int mmio_offset;
109   unsigned int buffers_offset;
110   int sarea_priv_offset;
111   unsigned int ring_start;
112   unsigned int ring_end;
113   unsigned int ring_size;
114   unsigned int front_offset;
115   unsigned int back_offset;
116   unsigned int depth_offset;
117   unsigned int w;
118   unsigned int h;
119   unsigned int pitch;
120   unsigned int pitch_bits;
121 } drm_i810_pre12_init_t;
122 typedef struct _drm_i810_tex_region {
123   unsigned char next, prev;
124   unsigned char in_use;
125   int age;
126 } drm_i810_tex_region_t;
127 typedef struct _drm_i810_sarea {
128   unsigned int ContextState[I810_CTX_SETUP_SIZE];
129   unsigned int BufferState[I810_DEST_SETUP_SIZE];
130   unsigned int TexState[2][I810_TEX_SETUP_SIZE];
131   unsigned int dirty;
132   unsigned int nbox;
133   struct drm_clip_rect boxes[I810_NR_SAREA_CLIPRECTS];
134   drm_i810_tex_region_t texList[I810_NR_TEX_REGIONS + 1];
135   int texAge;
136   int last_enqueue;
137   int last_dispatch;
138   int last_quiescent;
139   int ctxOwner;
140   int vertex_prim;
141   int pf_enabled;
142   int pf_active;
143   int pf_current_page;
144 } drm_i810_sarea_t;
145 #define DRM_I810_INIT 0x00
146 #define DRM_I810_VERTEX 0x01
147 #define DRM_I810_CLEAR 0x02
148 #define DRM_I810_FLUSH 0x03
149 #define DRM_I810_GETAGE 0x04
150 #define DRM_I810_GETBUF 0x05
151 #define DRM_I810_SWAP 0x06
152 #define DRM_I810_COPY 0x07
153 #define DRM_I810_DOCOPY 0x08
154 #define DRM_I810_OV0INFO 0x09
155 #define DRM_I810_FSTATUS 0x0a
156 #define DRM_I810_OV0FLIP 0x0b
157 #define DRM_I810_MC 0x0c
158 #define DRM_I810_RSTATUS 0x0d
159 #define DRM_I810_FLIP 0x0e
160 #define DRM_IOCTL_I810_INIT DRM_IOW(DRM_COMMAND_BASE + DRM_I810_INIT, drm_i810_init_t)
161 #define DRM_IOCTL_I810_VERTEX DRM_IOW(DRM_COMMAND_BASE + DRM_I810_VERTEX, drm_i810_vertex_t)
162 #define DRM_IOCTL_I810_CLEAR DRM_IOW(DRM_COMMAND_BASE + DRM_I810_CLEAR, drm_i810_clear_t)
163 #define DRM_IOCTL_I810_FLUSH DRM_IO(DRM_COMMAND_BASE + DRM_I810_FLUSH)
164 #define DRM_IOCTL_I810_GETAGE DRM_IO(DRM_COMMAND_BASE + DRM_I810_GETAGE)
165 #define DRM_IOCTL_I810_GETBUF DRM_IOWR(DRM_COMMAND_BASE + DRM_I810_GETBUF, drm_i810_dma_t)
166 #define DRM_IOCTL_I810_SWAP DRM_IO(DRM_COMMAND_BASE + DRM_I810_SWAP)
167 #define DRM_IOCTL_I810_COPY DRM_IOW(DRM_COMMAND_BASE + DRM_I810_COPY, drm_i810_copy_t)
168 #define DRM_IOCTL_I810_DOCOPY DRM_IO(DRM_COMMAND_BASE + DRM_I810_DOCOPY)
169 #define DRM_IOCTL_I810_OV0INFO DRM_IOR(DRM_COMMAND_BASE + DRM_I810_OV0INFO, drm_i810_overlay_t)
170 #define DRM_IOCTL_I810_FSTATUS DRM_IO(DRM_COMMAND_BASE + DRM_I810_FSTATUS)
171 #define DRM_IOCTL_I810_OV0FLIP DRM_IO(DRM_COMMAND_BASE + DRM_I810_OV0FLIP)
172 #define DRM_IOCTL_I810_MC DRM_IOW(DRM_COMMAND_BASE + DRM_I810_MC, drm_i810_mc_t)
173 #define DRM_IOCTL_I810_RSTATUS DRM_IO(DRM_COMMAND_BASE + DRM_I810_RSTATUS)
174 #define DRM_IOCTL_I810_FLIP DRM_IO(DRM_COMMAND_BASE + DRM_I810_FLIP)
175 typedef struct _drm_i810_clear {
176   int clear_color;
177   int clear_depth;
178   int flags;
179 } drm_i810_clear_t;
180 typedef struct _drm_i810_vertex {
181   int idx;
182   int used;
183   int discard;
184 } drm_i810_vertex_t;
185 typedef struct _drm_i810_copy_t {
186   int idx;
187   int used;
188   void * address;
189 } drm_i810_copy_t;
190 #define PR_TRIANGLES (0x0 << 18)
191 #define PR_TRISTRIP_0 (0x1 << 18)
192 #define PR_TRISTRIP_1 (0x2 << 18)
193 #define PR_TRIFAN (0x3 << 18)
194 #define PR_POLYGON (0x4 << 18)
195 #define PR_LINES (0x5 << 18)
196 #define PR_LINESTRIP (0x6 << 18)
197 #define PR_RECTS (0x7 << 18)
198 #define PR_MASK (0x7 << 18)
199 typedef struct drm_i810_dma {
200   void * __linux_virtual;
201   int request_idx;
202   int request_size;
203   int granted;
204 } drm_i810_dma_t;
205 typedef struct _drm_i810_overlay_t {
206   unsigned int offset;
207   unsigned int physical;
208 } drm_i810_overlay_t;
209 typedef struct _drm_i810_mc {
210   int idx;
211   int used;
212   int num_blocks;
213   int * length;
214   unsigned int last_render;
215 } drm_i810_mc_t;
216 #ifdef __cplusplus
217 #endif
218 #endif
219