1# 2# Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are met: 6# 7# Redistributions of source code must retain the above copyright notice, this 8# list of conditions and the following disclaimer. 9# 10# Redistributions in binary form must reproduce the above copyright notice, 11# this list of conditions and the following disclaimer in the documentation 12# and/or other materials provided with the distribution. 13# 14# Neither the name of ARM nor the names of its contributors may be used 15# to endorse or promote products derived from this software without specific 16# prior written permission. 17# 18# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28# POSSIBILITY OF SUCH DAMAGE. 29# 30 31# On FVP, the TSP can execute either from Trusted SRAM or Trusted DRAM. 32# Trusted SRAM is the default. 33FVP_TSP_RAM_LOCATION := tsram 34ifeq (${FVP_TSP_RAM_LOCATION}, tsram) 35 FVP_TSP_RAM_LOCATION_ID := FVP_TRUSTED_SRAM_ID 36else ifeq (${FVP_TSP_RAM_LOCATION}, tdram) 37 FVP_TSP_RAM_LOCATION_ID := FVP_TRUSTED_DRAM_ID 38else ifeq (${FVP_TSP_RAM_LOCATION}, dram) 39 FVP_TSP_RAM_LOCATION_ID := FVP_DRAM_ID 40else 41 $(error "Unsupported FVP_TSP_RAM_LOCATION value") 42endif 43 44# Process flags 45$(eval $(call add_define,FVP_TSP_RAM_LOCATION_ID)) 46 47PLAT_INCLUDES := -Iplat/fvp/include/ 48 49PLAT_BL_COMMON_SOURCES := drivers/arm/pl011/pl011_console.S \ 50 drivers/io/io_fip.c \ 51 drivers/io/io_memmap.c \ 52 drivers/io/io_semihosting.c \ 53 drivers/io/io_storage.c \ 54 lib/aarch64/xlat_tables.c \ 55 lib/semihosting/semihosting.c \ 56 lib/semihosting/aarch64/semihosting_call.S \ 57 plat/common/aarch64/plat_common.c \ 58 plat/fvp/fvp_io_storage.c 59 60BL1_SOURCES += drivers/arm/cci400/cci400.c \ 61 lib/cpus/aarch64/aem_generic.S \ 62 lib/cpus/aarch64/cortex_a53.S \ 63 lib/cpus/aarch64/cortex_a57.S \ 64 plat/common/aarch64/platform_up_stack.S \ 65 plat/fvp/bl1_fvp_setup.c \ 66 plat/fvp/aarch64/fvp_common.c \ 67 plat/fvp/aarch64/fvp_helpers.S 68 69BL2_SOURCES += drivers/arm/tzc400/tzc400.c \ 70 plat/common/aarch64/platform_up_stack.S \ 71 plat/fvp/bl2_fvp_setup.c \ 72 plat/fvp/fvp_security.c \ 73 plat/fvp/aarch64/fvp_common.c 74 75BL31_SOURCES += drivers/arm/cci400/cci400.c \ 76 drivers/arm/gic/arm_gic.c \ 77 drivers/arm/gic/gic_v2.c \ 78 drivers/arm/gic/gic_v3.c \ 79 drivers/arm/tzc400/tzc400.c \ 80 lib/cpus/aarch64/aem_generic.S \ 81 lib/cpus/aarch64/cortex_a53.S \ 82 lib/cpus/aarch64/cortex_a57.S \ 83 plat/common/plat_gic.c \ 84 plat/common/aarch64/platform_mp_stack.S \ 85 plat/fvp/bl31_fvp_setup.c \ 86 plat/fvp/fvp_pm.c \ 87 plat/fvp/fvp_security.c \ 88 plat/fvp/fvp_topology.c \ 89 plat/fvp/aarch64/fvp_helpers.S \ 90 plat/fvp/aarch64/fvp_common.c \ 91 plat/fvp/drivers/pwrc/fvp_pwrc.c 92 93ifneq (${TRUSTED_BOARD_BOOT},0) 94 BL1_SOURCES += plat/fvp/fvp_trusted_boot.c 95 BL2_SOURCES += plat/fvp/fvp_trusted_boot.c 96endif 97