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1;------------------------------------------------------------------------------
2;
3; CopyMem() worker for ARM
4;
5; This file started out as C code that did 64 bit moves if the buffer was
6; 32-bit aligned, else it does a byte copy. It also does a byte copy for
7; any trailing bytes. Update using VSTM/SLDM to do 128 byte copies.
8;
9; Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
10; This program and the accompanying materials
11; are licensed and made available under the terms and conditions of the BSD License
12; which accompanies this distribution.  The full text of the license may be found at
13; http://opensource.org/licenses/bsd-license.php
14;
15; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
16; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17;
18;------------------------------------------------------------------------------
19
20/**
21  Copy Length bytes from Source to Destination. Overlap is OK.
22
23  This implementation
24
25  @param  Destination Target of copy
26  @param  Source      Place to copy from
27  @param  Length      Number of bytes to copy
28
29  @return Destination
30
31
32VOID *
33EFIAPI
34InternalMemCopyMem (
35  OUT     VOID                      *DestinationBuffer,
36  IN      CONST VOID                *SourceBuffer,
37  IN      UINTN                     Length
38  )
39**/
40
41    INCLUDE AsmMacroExport.inc
42
43 RVCT_ASM_EXPORT InternalMemCopyMem
44  stmfd  sp!, {r4, r9, lr}
45  tst  r0, #3
46  mov  r4, r0
47  mov  r9, r0
48  mov  ip, r2
49  mov  lr, r1
50  movne  r0, #0
51  bne  L4
52  tst  r1, #3
53  movne  r3, #0
54  moveq  r3, #1
55  cmp  r2, #127
56  movls  r0, #0
57  andhi  r0, r3, #1
58L4
59  cmp  r4, r1
60  bcc  L26
61  bls  L7
62  rsb  r3, r1, r4
63  cmp  ip, r3
64  bcc  L26
65  cmp  ip, #0
66  beq  L7
67  add  r9, r4, ip
68  add  lr, ip, r1
69  b  L16
70L29
71  sub  ip, ip, #8
72  cmp  ip, #7
73  ldrd  r2, [lr, #-8]!
74  movls  r0, #0
75  cmp  ip, #0
76  strd  r2, [r9, #-8]!
77  beq  L7
78L16
79  cmp  r0, #0
80  bne  L29
81  sub  r3, lr, #1
82  sub  ip, ip, #1
83  ldrb  r3, [r3, #0]
84  sub  r2, r9, #1
85  cmp  ip, #0
86  sub  r9, r9, #1
87  sub  lr, lr, #1
88  strb  r3, [r2, #0]
89  bne  L16
90  b   L7
91L11
92  ldrb  r3, [lr], #1
93  sub  ip, ip, #1
94  strb  r3, [r9], #1
95L26
96  cmp  ip, #0
97  beq  L7
98L30
99  cmp  r0, #0
100  beq  L11
101  sub  ip, ip, #128          // 32
102  cmp  ip, #127              // 31
103  vldm     lr!, {d0-d15}
104  movls  r0, #0
105  cmp  ip, #0
106  vstm  r9!, {d0-d15}
107  bne  L30
108L7
109  dsb
110  mov  r0, r4
111  ldmfd  sp!, {r4, r9, pc}
112
113  END
114
115