1/**************************************************************************; 2;* *; 3;* *; 4;* Intel Corporation - ACPI Reference Code for the Baytrail *; 5;* Family of Customer Reference Boards. *; 6;* *; 7;* *; 8;* Copyright (c) 2012 - 2014, Intel Corporation. All rights reserved *; 9; 10; This program and the accompanying materials are licensed and made available under 11; the terms and conditions of the BSD License that accompanies this distribution. 12; The full text of the license may be found at 13; http://opensource.org/licenses/bsd-license.php. 14; 15; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 16; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 17; 18;* *; 19;* *; 20;**************************************************************************/ 21Device (PEPD) 22{ 23 Name (_HID, "INT3396") 24 Name(_CID, 0x800dd041) 25 Name (_UID, 0x1) 26 27 // Indicates if the platform PEP has loaded 28 Name(PEPP, Zero) 29 30 // Devices score-boarded by the PEP, Rev0 format 31 Name (DEVS, Package() {0}) 32 33 // Devices score-boarded by the PEP, Rev1 format 34 Name(DEVX, Package() 35 { 36 Package () {"\\_SB.PCI0.XHC1", 0x1}, 37 Package () {"\\_SB.PCI0.EHC1", 0x1}, 38 Package () {"\\_SB.PCI0.GFX0", 0x1}, 39 Package () {"\\_SB.PCI0.GFX0.ISP0", 0x1}, 40 Package () {"\\_SB.PCI0.SEC0", 0x1}, 41 Package () {"\\_SB.I2C1", 0x1}, 42 Package () {"\\_SB.I2C2", 0x1}, 43 Package () {"\\_SB.I2C3", 0x1}, 44 Package () {"\\_SB.I2C4", 0x1}, 45 Package () {"\\_SB.I2C5", 0x1}, 46 Package () {"\\_SB.I2C6", 0x1}, 47 Package () {"\\_SB.I2C7", 0x1}, 48 Package () {"\\_SB.SDHA", 0x1}, 49 Package () {"\\_SB.SDHB", 0x1}, 50 Package () {"\\_SB.SDHC", 0x1}, 51 Package () {"\\_SB.SPI1", 0x1}, 52 Package () {"\\_SB.URT1", 0x1}, 53 Package () {"\\_SB.URT2", 0x1}, 54 }) 55 // Crashdump device package 56 Name(CDMP, Package(2) {}) 57 // Device dependency for uPEP 58 Name(DEVY, Package() 59 { 60 Package() {"\\_PR.CPU0", 0x1, Package() {Package() {0xFF, 0}}}, 61 Package() {"\\_PR.CPU1", 0x1, Package() {Package() {0xFF, 0}}}, 62 Package() {"\\_PR.CPU2", 0x1, Package() {Package() {0xFF, 0}}}, 63 Package() {"\\_PR.CPU3", 0x1, Package() {Package() {0xFF, 0}}}, 64 Package() {"\\_SB.I2C1", 0x1, Package() {Package() {0xFF,3}}}, 65 Package() {"\\_SB.I2C2", 0x1, Package() {Package() {0xFF,3}}}, 66 Package() {"\\_SB.I2C3", 0x1, Package() {Package() {0xFF,3}}}, 67 Package() {"\\_SB.I2C4", 0x1, Package() {Package() {0xFF,3}}}, 68 Package() {"\\_SB.I2C5", 0x1, Package() {Package() {0xFF,3}}}, 69 Package() {"\\_SB.I2C6", 0x1, Package() {Package() {0xFF,3}}}, 70 Package() {"\\_SB.I2C7", 0x1, Package() {Package() {0xFF,3}}}, 71 Package() {"\\_SB.PCI0.GFX0", 0x1, Package() {Package() {0xFF,3}}}, 72 Package() {"\\_SB.PCI0.SEC0", 0x1, Package() {Package() {0xFF,3}}}, 73 Package() {"\\_SB.PCI0.XHC1", 0x1, Package() {Package() {0xFF,3}}}, 74 Package() {"\\_SB.PCI0.GFX0.ISP0", 0x1, Package() {Package() {0xFF,3}}}, 75 Package() {"\\_SB.LPEA", 0x1, Package() {Package() {0x0,3}, Package() {0x1,0}, Package() {0x2,3}, Package() {0x3,3}}}, 76 Package() {"\\_SB.SDHA", 0x1, Package() {Package() {0xFF,3}}}, 77 Package() {"\\_SB.SDHB", 0x1, Package() {Package() {0xFF,3}}}, 78 Package() {"\\_SB.SDHC", 0x1, Package() {Package() {0xFF,3}}}, 79 Package() {"\\_SB.SPI1", 0x1, Package() {Package() {0xFF,3}}}, 80 Package() {"\\_SB.URT1", 0x1, Package() {Package() {0xFF,3}}}, 81 Package() {"\\_SB.URT2", 0x1, Package() {Package() {0xFF,3}}} 82 }) 83 // BCCD crashdump information 84 Name(BCCD, Package() 85 { 86 Package() 87 { 88 "\\_SB.SDHA", 89 Package() 90 { 91 Package() { Package() {0, 32, 0, 3, 0xFFFFFFFFFFFFFFFF}, Package() {0xFFFFFFFC, 0x0, 0x4}, 0} 92 } 93 } 94 }) 95 96 Method(_STA, 0x0, NotSerialized) 97 { 98 Return(0xf) 99 } 100 101 Method(_DSM, 0x4, Serialized) 102 { 103 If(LEqual(Arg0,ToUUID("B8FEBFE0-BAF8-454b-AECD-49FB91137B21"))) 104 { 105 106 // Number of fn IDs supported 107 If(LEqual(Arg2, Zero)) 108 { 109 Return(Buffer(One) 110 { 111 0xf 112 }) 113 } 114 115 // Pep presence 116 If(LEqual(Arg2, One)) 117 { 118 Store(0x1, PEPP) 119 Return(0xf) 120 } 121 122 // Mitigation devices 123 If(LEqual(Arg2, 0x2)) 124 { 125 If(LEqual(Arg1, 0x0)) 126 { 127 // Rev0 128 Return(DEVS) 129 } 130 If(LEqual(Arg1, 0x1)) 131 { 132 // Rev1 133 Return(DEVX) 134 } 135 } 136 137 // Crashdump device data 138 If(LEqual(Arg2, 0x3)) 139 { 140 Store("\\_SB.SDHA", Index(CDMP,0)) 141 Store(EM1A, Index(CDMP,1)) 142 Return(CDMP) 143 } 144 } 145 // New UUID for built-in uPEP 146 If(LEqual(Arg0,ToUUID("C4EB40A0-6CD2-11E2-BCFD-0800200C9A66"))) 147 { 148 149 // Number of fn IDs supported 150 If(LEqual(Arg2, Zero)) 151 { 152 Return(Buffer(One) 153 { 154 0x7 155 }) 156 } 157 // LPI device dependencies 158 If(LEqual(Arg2, 0x1)) 159 { 160 Return(DEVY) 161 } 162 // Crashdump device data 163 If(LEqual(Arg2, 0x2)) 164 { 165 Store(EM1A, Local0) 166 Add(Local0, 0x84, Local0) 167 Store(Local0, Index(DerefOf(Index(DerefOf(Index(DerefOf(Index(DerefOf(Index(BCCD, Zero, )), One, )), Zero, )), Zero, )), 0x4, )) 168 Return(BCCD) 169 } 170 } 171 172 Return(One) 173 } 174} 175 176// 177// eMMC 4.41 178// 179Device(SDHA) 180{ 181 Name (_ADR, 0) 182 Name (_HID, "80860F14") 183 Name (_CID, "PNP0D40") 184 Name (_DDN, "Intel(R) eMMC Controller - 80860F14") 185 Name (_UID, 1) 186 Name(_DEP, Package(0x1) 187 { 188 PEPD 189 }) 190 191 Name (RBF1, ResourceTemplate () 192 { 193 Memory32Fixed (ReadWrite, 0x00000000, 0x00001000, BAR0) 194 Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, , , ) {45} // eMMC 4.41 IRQ 195 }) 196 197 Method (_CRS, 0x0, NotSerialized) 198 { 199 // Update the Base address for BAR0 of eMMC 4.41 200 CreateDwordField(^RBF1, ^BAR0._BAS, B0B1) 201 CreateDwordField(^RBF1, ^BAR0._LEN, B0L1) 202 Store(eM0A, B0B1) 203 Store(eM0L, B0L1) 204 Return (RBF1) 205 } 206 Method (_STA, 0x0, NotSerialized) 207 { 208 // 209 // PCIM>> 0:ACPI mode 1:PCI mode 210 // SD1D>> 0:eMMC 4.41 enable 1:eMMC 4.41 disable 211 // 212 If (LAnd(LEqual(PCIM, 0), LEqual(SD1D, 0))) 213 { 214 Return (0xF) 215 } 216 Else 217 { 218 Return (0x0) 219 } 220 } 221 222 223 Method (_PS3, 0, NotSerialized) 224 { 225 OR(PSAT, 0x00000003, PSAT) 226 OR(PSAT, 0X00000000, PSAT) 227 // 228 // If not B1, still keep 2 ms w/a 229 // 230 If(LLess(SOCS, 0x03)) 231 { 232 Sleep(2) 233 } 234 } 235 Method (_PS0, 0, NotSerialized) 236 { 237 And(PSAT, 0xfffffffC, PSAT) 238 OR(PSAT, 0X00000000, PSAT) 239 // 240 // If not B1, still keep 2 ms w/a 241 // 242 If(LLess(SOCS, 0x03)) 243 { 244 Sleep(2) 245 } 246 } 247 248 OperationRegion (KEYS, SystemMemory, eM1A, 0x100) 249 Field (KEYS, DWordAcc, NoLock, WriteAsZeros) 250 { 251 Offset (0x84), 252 PSAT, 32 253 } 254 255 Method (_DIS, 0x0, NotSerialized) 256 { 257 //Adding dummy disable methods for device EMM0 258 } 259 260 Device (EMMD) 261 { 262 Name (_ADR, 0x00000008) // Slot 0, Function 8 263 Method (_RMV, 0, NotSerialized) 264 { 265 Return (0x0) 266 } 267 } 268} 269 270 271// 272// eMMC 4.5 273// 274Device(SDHD) 275{ 276 Name (_ADR, 0) 277 Name (_HID, "80860F14") 278 Name (_CID, "PNP0D40") 279 Name (_DDN, "Intel(R) eMMC Controller - 80860F14") 280 Name (_UID, 1) 281 Name(_DEP, Package(0x1) 282 { 283 PEPD 284 }) 285 286 Name (RBF1, ResourceTemplate () 287 { 288 Memory32Fixed (ReadWrite, 0x00000000, 0x00001000, BAR0) 289 Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, , , ) {44} // eMMC 4.5 IRQ 290 }) 291 Method (_CRS, 0x0, NotSerialized) 292 { 293 CreateDwordField(^RBF1, ^BAR0._BAS, B0B1) 294 CreateDwordField(^RBF1, ^BAR0._LEN, B0L1) 295 Store(eM0A, B0B1) 296 Store(eM0L, B0L1) 297 Return (RBF1) 298 } 299 Method (_STA, 0x0, NotSerialized) 300 { 301 // 302 // PCIM>> 0:ACPI mode 1:PCI mode 303 // HSID>> 0:eMMC 4.5 enable 1:eMMC 4.5 disable 304 // 305 If (LAnd(LEqual(PCIM, 0), LEqual(HSID, 0))) 306 { 307 Return (0xF) 308 } 309 Else 310 { 311 Return (0x0) 312 } 313 } 314 315 316 Method (_PS3, 0, NotSerialized) 317 { 318 OR(PSAT, 0x00000003, PSAT) 319 OR(PSAT, 0X00000000, PSAT) 320 // 321 // If not B1, still keep 2 ms w/a 322 // 323 If(LLess(SOCS, 0x03)) 324 { 325 Sleep(2) 326 } 327 } 328 Method (_PS0, 0, NotSerialized) 329 { 330 And(PSAT, 0xfffffffC, PSAT) 331 OR(PSAT, 0X00000000, PSAT) 332 // 333 // If not B1, still keep 2 ms w/a 334 // 335 If(LLess(SOCS, 0x03)) 336 { 337 Sleep(2) 338 } 339 } 340 341 OperationRegion (KEYS, SystemMemory, eM1A, 0x100) 342 Field (KEYS, DWordAcc, NoLock, WriteAsZeros) 343 { 344 Offset (0x84), 345 PSAT, 32 346 } 347 348 Method (_DIS, 0x0, NotSerialized) 349 { 350 //Adding dummy disable methods for device EMM0 351 } 352 353 Device (EM45) 354 { 355 Name (_ADR, 0x00000008) // Slot 0, Function 8 356 Method (_RMV, 0, NotSerialized) 357 { 358 Return (0x0) 359 } 360 } 361} 362 363 364// 365// SDIO 366// 367Device(SDHB) 368{ 369 Name (_ADR, 0) 370 Name (_HID, "INT33BB") 371 Name (_CID, "PNP0D40") 372 Name (_DDN, "Intel(R) SDIO Controller - 80860F15") 373 Name (_UID, 2) 374 Name (_HRV, 2) 375 Name(_DEP, Package(0x01) 376 { 377 PEPD 378 }) 379 Name (PSTS, 0x0) 380 381 Name (RBUF, ResourceTemplate () 382 { 383 Memory32Fixed (ReadWrite, 0x00000000, 0x00001000, BAR0) 384 Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, , , ) {46} // SDIO IRQ 385 }) 386 387 Method (_CRS, 0x0, NotSerialized) 388 { 389 390 CreateDwordField(^RBUF, ^BAR0._BAS, B0BA) 391 CreateDwordField(^RBUF, ^BAR0._LEN, B0LN) 392 Store(SI0A, B0BA) 393 Store(SI0L, B0LN) 394 Return (RBUF) 395 } 396 Method (_STA, 0x0, NotSerialized) 397 { 398 If (LLessEqual(STEP, 0x04)) 399 { 400 //A stepping 401 Store(SDMD, _HRV) 402 } 403 404 // 405 // PCIM>> 0:ACPI mode 1:PCI mode 406 // 407 If (LEqual(PCIM, 1)) { 408 Return (0x0) 409 } 410 411 If (LOr(LEqual(SI0A, 0), LEqual(SD2D, 1))) 412 { 413 Return (0x0) 414 } 415 Return (0xF) 416 } 417 Method (_DIS, 0x0, NotSerialized) 418 { 419 //Adding dummy disable methods for device EMM0 420 } 421 422 Method (_PS3, 0, NotSerialized) 423 { 424 OR(PSAT, 0x00000003, PSAT) 425 OR(PSAT, 0X00000000, PSAT) 426 } 427 Method (_PS0, 0, NotSerialized) 428 { 429 And(PSAT, 0xfffffffC, PSAT) 430 OR(PSAT, 0X00000000, PSAT) 431 432 if(LEqual(\_SB.SDHB.PSTS,0x0)) 433 { 434 if(LEqual (\_SB.GPO2.AVBL, 1)) 435 { 436 Store( 0x01, \_SB.GPO2.WFD3 ) // WL_WIFI_REQ_ON = 1 put the device to normal state 437 Store( 0x01, \_SB.SDHB.PSTS) // indicates that the device powered ON 438 } 439 } 440 441 442 } 443 OperationRegion (KEYS, SystemMemory, SI1A, 0x100) 444 Field (KEYS, DWordAcc, NoLock, WriteAsZeros) 445 { 446 Offset (0x84), 447 PSAT, 32 448 } 449 450 451 Device (BRCM) 452 { 453 Name (_ADR, 0x01) //SlotNumber + Function 454 Name (_DEP, Package() {\_SB.GPO2}) 455 456 Method (_RMV, 0, NotSerialized) 457 { 458 Return (0x0) 459 } 460 Name (_PRW, Package() {0, 0}) 461 Name (_S4W, 2) 462 463 Method (_CRS, 0, Serialized) 464 { 465 Name (RBUF, ResourceTemplate () 466 { 467 Interrupt (ResourceConsumer, Edge, ActiveHigh, ExclusiveAndWake, , , ) {73} 468 }) 469 Return (RBUF) 470 } 471 472 Method (_PS3, 0, NotSerialized) 473 { 474 if(LEqual (\_SB.GPO2.AVBL, 1)) 475 { 476 Store( 0x00, \_SB.GPO2.WFD3 ) // WL_WIFI_REQ_ON = 0 puts the device in reset state 477 Store( 0x00, \_SB.SDHB.PSTS) //Indicates that the device is powered off 478 } 479 480 } 481 Method (_PS0, 0, NotSerialized) 482 { 483 if(LEqual(\_SB.SDHB.PSTS,0x0)) 484 { 485 if(LEqual (\_SB.GPO2.AVBL, 1)) 486 { 487 Store( 0x01, \_SB.GPO2.WFD3 ) // WL_WIFI_REQ_ON = 1 put the device to normal state 488 Store( 0x01, \_SB.SDHB.PSTS) // indicates that the device powered ON 489 } 490 } 491 } 492 } // Device (BRCM) 493 // 494 // Secondary Broadcom WIFI function 495 // 496 Device(BRC2) 497 { 498 Name(_ADR, 0x2) // function 2 499 Name(_STA, 0xf) 500 // 501 // The device is not removable. This must be a method. 502 // 503 Method(_RMV, 0x0, NotSerialized) 504 { 505 Return(0x0) 506 } 507 508 // 509 // Describe a vendor-defined connection between this device and the 510 // primary wifi device 511 // 512 513 Method(_CRS) 514 { 515 Name(NAM, Buffer() {"\\_SB.SDHB.BRCM"}) 516 Name(SPB, Buffer() 517 { 518 0x8E, // SPB Descriptor 519 0x18, 0x00, // Length including NAM above 520 0x01, // +0x00 SPB Descriptor Revision 521 0x00, // +0x01 Resource Source Index 522 0xc0, // +0x02 Bus type - vendor defined 523 0x02, // +0x03 Consumer + controller initiated 524 0x00, 0x00, // +0x04 Type specific flags 525 0x01, // +0x06 Type specific revision 526 0x00, 0x00 // +0x07 type specific data length 527 // +0x09 - 0xf bytes for NULL-terminated NAM 528 // Length = 0x18 529 }) 530 531 Name(END, Buffer() {0x79, 0x00}) 532 Concatenate(SPB, NAM, Local0) 533 Concatenate(Local0, END, Local1) 534 Return(Local1) 535 } 536 } 537 538} 539 540// 541// SD Card 542// 543Device(SDHC) 544{ 545 Name (_ADR, 0) 546 Name (_HID, "80860F16") 547 Name (_CID, "PNP0D40") 548 Name (_DDN, "Intel(R) SD Card Controller - 80860F16") 549 Name (_UID, 3) 550 Name(_DEP, Package(0x01) 551 { 552 PEPD 553 }) 554 Name (RBUF, ResourceTemplate () 555 { 556 Memory32Fixed (ReadWrite, 0x00000000, 0x00001000, BAR0) 557 Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, , , ) {47} // SD Card IRQ 558 }) 559 Method (_CRS, 0x0, NotSerialized) 560 { 561 CreateDwordField(^RBUF, ^BAR0._BAS, B0BA) 562 CreateDwordField(^RBUF, ^BAR0._LEN, B0LN) 563 Store(SD0A, B0BA) 564 Store(SD0L, B0LN) 565 Return (RBUF) 566 } 567 Method (_STA, 0x0, NotSerialized) 568 { 569 // 570 // PCIM>> 0:ACPI mode 1:PCI mode 571 // 572 If (LEqual(PCIM, 1)) { 573 Return (0x0) 574 } 575 576 If (LOr(LEqual(SD0A, 0), LEqual(SD3D, 1))) 577 { 578 Return (0x0) 579 } 580 Return (0xF) 581 } 582 583 Method (_PS3, 0, NotSerialized) 584 { 585 OR(PSAT, 0x00000003, PSAT) 586 OR(PSAT, 0X00000000, PSAT) 587 } 588 Method (_PS0, 0, NotSerialized) 589 { 590 And(PSAT, 0xfffffffC, PSAT) 591 OR(PSAT, 0X00000000, PSAT) 592 } 593 OperationRegion (KEYS, SystemMemory, SD1A, 0x100) 594 Field (KEYS, DWordAcc, NoLock, WriteAsZeros) 595 { 596 Offset (0x84), 597 PSAT, 32 598 } 599 600 Device (CARD) 601 { 602 Name (_ADR, 0x00000008) 603 Method(_RMV, 0x0, NotSerialized) 604 { 605 // SDRM = 0 non-removable; 606 If (LEqual(SDRM, 0)) 607 { 608 Return (0) 609 } 610 611 Return (1) 612 } 613 } 614 615} 616 617