1 // RUN: %clang_cc1 %s -O3 -triple=x86_64-apple-darwin -target-feature +avx -emit-llvm -o - | FileCheck %s
2 // FIXME: The shufflevector instructions in test_cmpgt_sd are relying on O3 here.
3
4 // Don't include mm_malloc.h, it's system specific.
5 #define __MM_MALLOC_H
6
7 #include <immintrin.h>
8
9 //
10 // Test LLVM IR codegen of cmpXY instructions
11 //
12
test_cmp_pd(__m128d a,__m128d b)13 __m128d test_cmp_pd(__m128d a, __m128d b) {
14 // Expects that the third argument in LLVM IR is immediate expression
15 // CHECK: @llvm.x86.sse2.cmp.pd({{.*}}, i8 13)
16 return _mm_cmp_pd(a, b, _CMP_GE_OS);
17 }
18
test_cmp_ps(__m128 a,__m128 b)19 __m128d test_cmp_ps(__m128 a, __m128 b) {
20 // Expects that the third argument in LLVM IR is immediate expression
21 // CHECK: @llvm.x86.sse.cmp.ps({{.*}}, i8 13)
22 return _mm_cmp_ps(a, b, _CMP_GE_OS);
23 }
24
test_cmp_pd256(__m256d a,__m256d b)25 __m256d test_cmp_pd256(__m256d a, __m256d b) {
26 // Expects that the third argument in LLVM IR is immediate expression
27 // CHECK: @llvm.x86.avx.cmp.pd.256({{.*}}, i8 13)
28 return _mm256_cmp_pd(a, b, _CMP_GE_OS);
29 }
30
test_cmp_ps256(__m256 a,__m256 b)31 __m256d test_cmp_ps256(__m256 a, __m256 b) {
32 // Expects that the third argument in LLVM IR is immediate expression
33 // CHECK: @llvm.x86.avx.cmp.ps.256({{.*}}, i8 13)
34 return _mm256_cmp_ps(a, b, _CMP_GE_OS);
35 }
36
test_cmp_sd(__m128d a,__m128d b)37 __m128d test_cmp_sd(__m128d a, __m128d b) {
38 // Expects that the third argument in LLVM IR is immediate expression
39 // CHECK: @llvm.x86.sse2.cmp.sd({{.*}}, i8 13)
40 return _mm_cmp_sd(a, b, _CMP_GE_OS);
41 }
42
test_cmp_ss(__m128 a,__m128 b)43 __m128d test_cmp_ss(__m128 a, __m128 b) {
44 // Expects that the third argument in LLVM IR is immediate expression
45 // CHECK: @llvm.x86.sse.cmp.ss({{.*}}, i8 13)
46 return _mm_cmp_ss(a, b, _CMP_GE_OS);
47 }
48
test_cmpgt_ss(__m128 a,__m128 b)49 __m128 test_cmpgt_ss(__m128 a, __m128 b) {
50 // CHECK: @llvm.x86.sse.cmp.ss({{.*}}, i8 1)
51 // CHECK: shufflevector <{{.*}}, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
52 return _mm_cmpgt_ss(a, b);
53 }
54
test_cmpge_ss(__m128 a,__m128 b)55 __m128 test_cmpge_ss(__m128 a, __m128 b) {
56 // CHECK: @llvm.x86.sse.cmp.ss({{.*}}, i8 2)
57 // CHECK: shufflevector <{{.*}}, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
58 return _mm_cmpge_ss(a, b);
59 }
60
test_cmpngt_ss(__m128 a,__m128 b)61 __m128 test_cmpngt_ss(__m128 a, __m128 b) {
62 // CHECK: @llvm.x86.sse.cmp.ss({{.*}}, i8 5)
63 // CHECK: shufflevector <{{.*}}, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
64 return _mm_cmpngt_ss(a, b);
65 }
66
test_cmpnge_ss(__m128 a,__m128 b)67 __m128 test_cmpnge_ss(__m128 a, __m128 b) {
68 // CHECK: @llvm.x86.sse.cmp.ss({{.*}}, i8 6)
69 // CHECK: shufflevector <{{.*}}, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
70 return _mm_cmpnge_ss(a, b);
71 }
72
test_cmpgt_sd(__m128d a,__m128d b)73 __m128d test_cmpgt_sd(__m128d a, __m128d b) {
74 // CHECK: @llvm.x86.sse2.cmp.sd({{.*}}, i8 1)
75 // CHECK: shufflevector <{{.*}}, <2 x i32> <i32 0, i32 3>
76 return _mm_cmpgt_sd(a, b);
77 }
78
test_cmpge_sd(__m128d a,__m128d b)79 __m128d test_cmpge_sd(__m128d a, __m128d b) {
80 // CHECK: @llvm.x86.sse2.cmp.sd({{.*}}, i8 2)
81 // CHECK: shufflevector <{{.*}}, <2 x i32> <i32 0, i32 3>
82 return _mm_cmpge_sd(a, b);
83 }
84
test_cmpngt_sd(__m128d a,__m128d b)85 __m128d test_cmpngt_sd(__m128d a, __m128d b) {
86 // CHECK: @llvm.x86.sse2.cmp.sd({{.*}}, i8 5)
87 // CHECK: shufflevector <{{.*}}, <2 x i32> <i32 0, i32 3>
88 return _mm_cmpngt_sd(a, b);
89 }
90
test_cmpnge_sd(__m128d a,__m128d b)91 __m128d test_cmpnge_sd(__m128d a, __m128d b) {
92 // CHECK: @llvm.x86.sse2.cmp.sd({{.*}}, i8 6)
93 // CHECK: shufflevector <{{.*}}, <2 x i32> <i32 0, i32 3>
94 return _mm_cmpnge_sd(a, b);
95 }
96