1 /* SPARC defaults for DWARF CFI.
2 Copyright (C) 2015 Oracle Inc.
3 This file is part of elfutils.
4
5 This file is free software; you can redistribute it and/or modify
6 it under the terms of either
7
8 * the GNU Lesser General Public License as published by the Free
9 Software Foundation; either version 3 of the License, or (at
10 your option) any later version
11
12 or
13
14 * the GNU General Public License as published by the Free
15 Software Foundation; either version 2 of the License, or (at
16 your option) any later version
17
18 or both in parallel, as here.
19
20 elfutils is distributed in the hope that it will be useful, but
21 WITHOUT ANY WARRANTY; without even the implied warranty of
22 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
23 General Public License for more details.
24
25 You should have received copies of the GNU General Public License and
26 the GNU Lesser General Public License along with this program. If
27 not, see <http://www.gnu.org/licenses/>. */
28
29 #ifdef HAVE_CONFIG_H
30 # include <config.h>
31 #endif
32
33 #include <dwarf.h>
34
35 #define BACKEND sparc_
36 #include "libebl_CPU.h"
37
38 int
sparc_abi_cfi(Ebl * ebl,Dwarf_CIE * abi_info)39 sparc_abi_cfi (Ebl *ebl __attribute__ ((unused)), Dwarf_CIE *abi_info)
40 {
41 static const uint8_t abi_cfi[] =
42 {
43 #define SV(n) DW_CFA_same_value, ULEB128_7 (n)
44 /* %g0 .. %g7 */
45 SV (0), SV (1), SV (2), SV (3), SV (4), SV (5), SV (6), SV (7),
46 /* %o0 .. %o7 */
47 SV (8), SV (9), SV (10), SV (11), SV (12), SV (13), SV (14), SV (15),
48 /* %l0 .. %l7 */
49 SV (16), SV (17), SV (18), SV (19), SV (20), SV (21), SV (22), SV (23),
50 /* %i0 .. %i7 */
51 SV (24), SV (25), SV (26), SV (27), SV (28), SV (29), SV (30), SV (31),
52 /* %f0 .. %f32 */
53 SV (32), SV (33), SV (34), SV (35), SV (36), SV (37), SV (38), SV (39),
54 SV (40), SV (41), SV (42), SV (43), SV (44), SV (45), SV (46), SV (47),
55 SV (48), SV (49), SV (50), SV (51), SV (52), SV (53), SV (54), SV (55),
56 SV (56), SV (57), SV (58), SV (59), SV (60), SV (61), SV (52), SV (63),
57 /* %f33 .. %63
58 Note that there are DWARF columns for the odd registers, even
59 if they don't exist in hardware) */
60 SV (64), SV (65), SV (66), SV (67), SV (68), SV (69), SV (70), SV (71),
61 SV (72), SV (73), SV (74), SV (75), SV (76), SV (77), SV (78), SV (79),
62 SV (80), SV (81), SV (82), SV (83), SV (84), SV (85), SV (86), SV (87),
63 SV (88), SV (89), SV (90), SV (91), SV (92), SV (93), SV (94), SV (95),
64 /* %fcc[0123] */
65 SV (96), SV (97), SV (98), SV (99),
66 /* %icc/%xcc */
67 SV (100),
68 /* Soft frame-pointer */
69 SV (101),
70 /* %gsr */
71 SV (102)
72 #undef SV
73 };
74
75 abi_info->initial_instructions = abi_cfi;
76 abi_info->initial_instructions_end = &abi_cfi[sizeof abi_cfi];
77 abi_info->data_alignment_factor = 4;
78
79 abi_info->return_address_register = 31; /* %i7 */
80
81 return 0;
82 }
83
84