1 //===-- AMDGPUCodeEmitter.h - AMDGPU Code Emitter interface -----*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 /// \file 11 /// \brief CodeEmitter interface for R600 and SI codegen. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #ifndef LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUMCCODEEMITTER_H 16 #define LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUMCCODEEMITTER_H 17 18 #include "llvm/MC/MCCodeEmitter.h" 19 #include "llvm/Support/raw_ostream.h" 20 21 namespace llvm { 22 23 class MCInst; 24 class MCOperand; 25 class MCSubtargetInfo; 26 27 class AMDGPUMCCodeEmitter : public MCCodeEmitter { 28 virtual void anchor(); 29 public: 30 31 uint64_t getBinaryCodeForInstr(const MCInst &MI, 32 SmallVectorImpl<MCFixup> &Fixups, 33 const MCSubtargetInfo &STI) const; 34 getMachineOpValue(const MCInst & MI,const MCOperand & MO,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI)35 virtual uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO, 36 SmallVectorImpl<MCFixup> &Fixups, 37 const MCSubtargetInfo &STI) const { 38 return 0; 39 } 40 getSOPPBrEncoding(const MCInst & MI,unsigned OpNo,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI)41 virtual unsigned getSOPPBrEncoding(const MCInst &MI, unsigned OpNo, 42 SmallVectorImpl<MCFixup> &Fixups, 43 const MCSubtargetInfo &STI) const { 44 return 0; 45 } 46 }; 47 48 } // End namespace llvm 49 50 #endif 51