1//===-- LeonFeatures.td - Describe the Leon Features -------*- tablegen -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// 11//===----------------------------------------------------------------------===// 12 13//===----------------------------------------------------------------------===// 14// CASA Support differs between LEON3-FT GR712RC and LEON3-FT UT699 15// We need to have the option to switch this on and off. 16//===----------------------------------------------------------------------===// 17 18// support to casa instruction; for leon3 subtarget only 19def LeonCASA : SubtargetFeature< 20 "hasleoncasa", "HasLeonCasa", "true", 21 "Enable CASA instruction for LEON3 and LEON4 processors">; 22 23//===----------------------------------------------------------------------===// 24// UMAC and SMAC support for LEON3 and LEON4 processors. 25//===----------------------------------------------------------------------===// 26 27// support to casa instruction; for leon3 subtarget only 28def UMACSMACSupport 29 : SubtargetFeature<"hasumacsmac", "HasUmacSmac", "true", 30 "Enable UMAC and SMAC for LEON3 and LEON4 processors">; 31 32//===----------------------------------------------------------------------===// 33// LEON Erratum fixes 34//===----------------------------------------------------------------------===// 35 36def ReplaceSDIV 37 : SubtargetFeature< 38 "replacesdiv", "PerformSDIVReplace", "true", 39 "AT697E erratum fix: Do not emit SDIV, emit SDIVCC instead">; 40 41def FixCALL 42 : SubtargetFeature<"fixcall", "FixCallImmediates", "true", 43 "AT697E erratum fix: Restrict the size of the immediate " 44 "operand of the CALL instruction to 20 bits">; 45 46def IgnoreZeroFlag 47 : SubtargetFeature<"ignrzeroflag", "IgnoreZeroFlag", "true", 48 "AT697E erratum fix: Do not rely on the zero bit flag " 49 "on a divide overflow for SDIVCC and UDIVCC">; 50 51def InsertNOPDoublePrecision 52 : SubtargetFeature<"insrtnopdblprcsn", "InsertNOPDoublePrecision", "true", 53 "LEON2 erratum fix: Insert a NOP before the double " 54 "precision floating point instruction">; 55 56def FixFSMULD : SubtargetFeature<"fixfsmuld", "FixFSMULD", "true", 57 "LEON3 erratum fix: Do not select FSMULD">; 58 59def ReplaceFMULS 60 : SubtargetFeature<"replacefmuls", "ReplaceFMULS", "true", 61 "LEON3 erratum fix: Replace FMULS instruction with a " 62 "routine using conversions/double precision operations " 63 "to replace FMULS">; 64 65def PreventRoundChange 66 : SubtargetFeature<"prvntroundchange", "PreventRoundChange", "true", 67 "LEON3 erratum fix: Prevent any rounding mode change " 68 "request: use only the round-to-nearest rounding mode">; 69 70def FixAllFDIVSQRT 71 : SubtargetFeature<"fixallfdivsqrt", "FixAllFDIVSQRT", "true", 72 "LEON3 erratum fix: Fix FDIVS/FDIVD/FSQRTS/FSQRTD " 73 "instructions with NOPs and floating-point store">; 74 75def InsertNOPLoad 76 : SubtargetFeature<"insertnopload", "InsertNOPLoad", "true", 77 "LEON3 erratum fix: Insert a NOP instruction after " 78 "every single-cycle load instruction when the next " 79 "instruction is another load/store instruction">; 80 81def FlushCacheLineSWAP 82 : SubtargetFeature<"flshcachelineswap", "FlushCacheLineSWAP", "true", 83 "LEON3 erratum fix: Flush cache line containing the " 84 "lock before performing any of the atomic instructions " 85 "SWAP and LDSTUB">; 86 87def InsertNOPsLoadStore 88 : SubtargetFeature<"insertnopsloadstore", "InsertNOPsLoadStore", "true", 89 "LEON3 erratum fix: Insert NOPs between " 90 "single-precision loads and the store, so the number of " 91 "instructions between is 4">; 92