1; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+sse2,-ssse3 -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=SSE2 2; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+sse2,+sse3,+ssse3 -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=SSSE3 3; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=SSE41 4; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7-avx -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=AVX 5; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=core-avx2 -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=AVX2 6 7 8; Verify the cost model for alternate shuffles. 9 10; shufflevector instructions with illegal 64-bit vector types. 11; 64-bit packed integer vectors (v2i32) are promoted to type v2i64. 12; 64-bit packed float vectors (v2f32) are widened to type v4f32. 13 14define <2 x i32> @test_v2i32(<2 x i32> %a, <2 x i32> %b) { 15 %1 = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 3> 16 ret <2 x i32> %1 17} 18; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v2i32': 19; SSE2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 20; SSSE3: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 21; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 22; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 23; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 24 25define <2 x float> @test_v2f32(<2 x float> %a, <2 x float> %b) { 26 %1 = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 3> 27 ret <2 x float> %1 28} 29; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v2f32': 30; SSE2: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector 31; SSSE3: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector 32; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 33; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 34; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 35 36define <2 x i32> @test_v2i32_2(<2 x i32> %a, <2 x i32> %b) { 37 %1 = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 2, i32 1> 38 ret <2 x i32> %1 39} 40; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v2i32_2': 41; SSE2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 42; SSSE3: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 43; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 44; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 45; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 46 47define <2 x float> @test_v2f32_2(<2 x float> %a, <2 x float> %b) { 48 %1 = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 2, i32 1> 49 ret <2 x float> %1 50} 51; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v2f32_2': 52; SSE2: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector 53; SSSE3: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector 54; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 55; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 56; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 57 58 59; Test shuffles on packed vectors of two elements. 60 61define <2 x i64> @test_v2i64(<2 x i64> %a, <2 x i64> %b) { 62 %1 = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 3> 63 ret <2 x i64> %1 64} 65; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v2i64': 66; SSE2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 67; SSSE3: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 68; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 69; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 70; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 71 72define <2 x double> @test_v2f64(<2 x double> %a, <2 x double> %b) { 73 %1 = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 3> 74 ret <2 x double> %1 75} 76; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v2f64': 77; SSE2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 78; SSSE3: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 79; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 80; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 81; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 82 83 84define <2 x i64> @test_v2i64_2(<2 x i64> %a, <2 x i64> %b) { 85 %1 = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 2, i32 1> 86 ret <2 x i64> %1 87} 88; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v2i64_2': 89; SSE2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 90; SSSE3: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 91; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 92; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 93; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 94 95 96define <2 x double> @test_v2f64_2(<2 x double> %a, <2 x double> %b) { 97 %1 = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 2, i32 1> 98 ret <2 x double> %1 99} 100; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v2f64_2': 101; SSE2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 102; SSSE3: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 103; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 104; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 105; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 106 107; Test shuffles on packed vectors of four elements. 108 109define <4 x i32> @test_v4i32(<4 x i32> %a, <4 x i32> %b) { 110 %1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 5, i32 2, i32 7> 111 ret <4 x i32> %1 112} 113; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v4i32': 114; SSE2: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector 115; SSSE3: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector 116; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 117; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 118; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 119 120 121define <4 x i32> @test_v4i32_2(<4 x i32> %a, <4 x i32> %b) { 122 %1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 3> 123 ret <4 x i32> %1 124} 125; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v4i32_2': 126; SSE2: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector 127; SSSE3: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector 128; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 129; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 130; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 131 132 133define <4 x float> @test_v4f32(<4 x float> %a, <4 x float> %b) { 134 %1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 5, i32 2, i32 7> 135 ret <4 x float> %1 136} 137; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v4f32': 138; SSE2: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector 139; SSSE3: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector 140; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 141; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 142; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 143 144 145define <4 x float> @test_v4f32_2(<4 x float> %a, <4 x float> %b) { 146 %1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 3> 147 ret <4 x float> %1 148} 149; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v4f32_2': 150; SSE2: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector 151; SSSE3: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector 152; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 153; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 154; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 155 156define <4 x i64> @test_v4i64(<4 x i64> %a, <4 x i64> %b) { 157 %1 = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> <i32 0, i32 5, i32 2, i32 7> 158 ret <4 x i64> %1 159} 160; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v4i64': 161; SSE2: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector 162; SSSE3: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector 163; SSE41: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector 164; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 165; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 166 167 168define <4 x i64> @test_v4i64_2(<4 x i64> %a, <4 x i64> %b) { 169 %1 = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 3> 170 ret <4 x i64> %1 171} 172; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v4i64_2': 173; SSE2: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector 174; SSSE3: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector 175; SSE41: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector 176; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 177; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 178 179 180define <4 x double> @test_v4f64(<4 x double> %a, <4 x double> %b) { 181 %1 = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 0, i32 5, i32 2, i32 7> 182 ret <4 x double> %1 183} 184; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v4f64': 185; SSE2: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector 186; SSSE3: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector 187; SSE41: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector 188; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 189; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 190 191 192define <4 x double> @test_v4f64_2(<4 x double> %a, <4 x double> %b) { 193 %1 = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 3> 194 ret <4 x double> %1 195} 196; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v4f64_2': 197; SSE2: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector 198; SSSE3: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector 199; SSE41: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector 200; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 201; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 202 203 204; Test shuffles on packed vectors of eight elements. 205define <8 x i16> @test_v8i16(<8 x i16> %a, <8 x i16> %b) { 206 %1 = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15> 207 ret <8 x i16> %1 208} 209; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v8i16': 210; SSE2: Cost Model: {{.*}} 8 for instruction: %1 = shufflevector 211; SSSE3: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector 212; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 213; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 214; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 215 216 217define <8 x i16> @test_v8i16_2(<8 x i16> %a, <8 x i16> %b) { 218 %1 = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 8, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 7> 219 ret <8 x i16> %1 220} 221; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v8i16_2': 222; SSE2: Cost Model: {{.*}} 8 for instruction: %1 = shufflevector 223; SSSE3: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector 224; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 225; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 226; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 227 228 229define <8 x i32> @test_v8i32(<8 x i32> %a, <8 x i32> %b) { 230 %1 = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15> 231 ret <8 x i32> %1 232} 233; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v8i32': 234; SSE2: Cost Model: {{.*}} 4 for instruction: %1 = shufflevector 235; SSSE3: Cost Model: {{.*}} 4 for instruction: %1 = shufflevector 236; SSE41: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector 237; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 238; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 239 240 241define <8 x i32> @test_v8i32_2(<8 x i32> %a, <8 x i32> %b) { 242 %1 = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 8, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 7> 243 ret <8 x i32> %1 244} 245; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v8i32_2': 246; SSE2: Cost Model: {{.*}} 4 for instruction: %1 = shufflevector 247; SSSE3: Cost Model: {{.*}} 4 for instruction: %1 = shufflevector 248; SSE41: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector 249; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 250; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 251 252 253define <8 x float> @test_v8f32(<8 x float> %a, <8 x float> %b) { 254 %1 = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15> 255 ret <8 x float> %1 256} 257; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v8f32': 258; SSE2: Cost Model: {{.*}} 4 for instruction: %1 = shufflevector 259; SSSE3: Cost Model: {{.*}} 4 for instruction: %1 = shufflevector 260; SSE41: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector 261; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 262; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 263 264 265define <8 x float> @test_v8f32_2(<8 x float> %a, <8 x float> %b) { 266 %1 = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 8, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 7> 267 ret <8 x float> %1 268} 269; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v8f32_2': 270; SSE2: Cost Model: {{.*}} 4 for instruction: %1 = shufflevector 271; SSSE3: Cost Model: {{.*}} 4 for instruction: %1 = shufflevector 272; SSE41: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector 273; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 274; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 275 276 277; Test shuffles on packed vectors of sixteen elements. 278define <16 x i8> @test_v16i8(<16 x i8> %a, <16 x i8> %b) { 279 %1 = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23, i32 8, i32 25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31> 280 ret <16 x i8> %1 281} 282; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v16i8': 283; SSE2: Cost Model: {{.*}} 48 for instruction: %1 = shufflevector 284; SSSE3: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector 285; SSE41: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector 286; AVX: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector 287; AVX2: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector 288 289 290define <16 x i8> @test_v16i8_2(<16 x i8> %a, <16 x i8> %b) { 291 %1 = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 16, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 13, i32 30, i32 15> 292 ret <16 x i8> %1 293} 294; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v16i8_2': 295; SSE2: Cost Model: {{.*}} 48 for instruction: %1 = shufflevector 296; SSSE3: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector 297; SSE41: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector 298; AVX: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector 299; AVX2: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector 300 301 302define <16 x i16> @test_v16i16(<16 x i16> %a, <16 x i16> %b) { 303 %1 = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23, i32 8, i32 25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31> 304 ret <16 x i16> %1 305} 306; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v16i16': 307; SSE2: Cost Model: {{.*}} 16 for instruction: %1 = shufflevector 308; SSSE3: Cost Model: {{.*}} 6 for instruction: %1 = shufflevector 309; SSE41: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector 310; AVX: Cost Model: {{.*}} 5 for instruction: %1 = shufflevector 311; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 312 313 314define <16 x i16> @test_v16i16_2(<16 x i16> %a, <16 x i16> %b) { 315 %1 = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> <i32 16, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 13, i32 30, i32 15> 316 ret <16 x i16> %1 317} 318; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v16i16_2': 319; SSE2: Cost Model: {{.*}} 16 for instruction: %1 = shufflevector 320; SSSE3: Cost Model: {{.*}} 6 for instruction: %1 = shufflevector 321; SSE41: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector 322; AVX: Cost Model: {{.*}} 5 for instruction: %1 = shufflevector 323; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector 324 325define <32 x i8> @test_v32i8(<32 x i8> %a, <32 x i8> %b) { 326 %1 = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 33, i32 2, i32 35, i32 4, i32 37, i32 6, i32 39, i32 8, i32 41, i32 10, i32 43, i32 12, i32 45, i32 14, i32 47, i32 16, i32 49, i32 18, i32 51, i32 20, i32 53, i32 22, i32 55, i32 24, i32 57, i32 26, i32 59, i32 28, i32 61, i32 30, i32 63> 327 ret <32 x i8> %1 328} 329; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v32i8': 330; SSE2: Cost Model: {{.*}} 96 for instruction: %1 = shufflevector 331; SSSE3: Cost Model: {{.*}} 6 for instruction: %1 = shufflevector 332; SSE41: Cost Model: {{.*}} 6 for instruction: %1 = shufflevector 333; AVX: Cost Model: {{.*}} 9 for instruction: %1 = shufflevector 334; AVX2: Cost Model: {{.*}} 9 for instruction: %1 = shufflevector 335 336 337define <32 x i8> @test_v32i8_2(<32 x i8> %a, <32 x i8> %b) { 338 %1 = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 32, i32 1, i32 34, i32 3, i32 36, i32 5, i32 38, i32 7, i32 40, i32 9, i32 42, i32 11, i32 44, i32 13, i32 46, i32 15, i32 48, i32 17, i32 50, i32 19, i32 52, i32 21, i32 54, i32 23, i32 56, i32 25, i32 58, i32 27, i32 60, i32 29, i32 62, i32 31> 339 ret <32 x i8> %1 340} 341; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v32i8_2': 342; SSE2: Cost Model: {{.*}} 96 for instruction: %1 = shufflevector 343; SSSE3: Cost Model: {{.*}} 6 for instruction: %1 = shufflevector 344; SSE41: Cost Model: {{.*}} 6 for instruction: %1 = shufflevector 345; AVX: Cost Model: {{.*}} 9 for instruction: %1 = shufflevector 346; AVX2: Cost Model: {{.*}} 9 for instruction: %1 = shufflevector 347 348