1; RUN: llc -verify-machineinstrs -o - %s -mtriple=aarch64-none-linux-gnu | FileCheck %s 2 3declare void @bar(i32) 4 5define void @test_float(float %a, float %b) { 6; CHECK-LABEL: test_float: 7 8 %tst1 = fcmp oeq float %a, %b 9 br i1 %tst1, label %end, label %t2 10; CHECK: fcmp {{s[0-9]+}}, {{s[0-9]+}} 11; CHECK: b.eq .L 12 13t2: 14 %tst2 = fcmp une float %b, 0.0 15 br i1 %tst2, label %t3, label %end 16; CHECK: fcmp {{s[0-9]+}}, #0.0 17; CHECK: b.eq .L 18 19 20t3: 21; This test can't be implemented with just one A64 conditional 22; branch. LLVM converts "ordered and not equal" to "unordered or 23; equal" before instruction selection, which is what we currently 24; test. Obviously, other sequences are valid. 25 %tst3 = fcmp one float %a, %b 26 br i1 %tst3, label %t4, label %end 27; CHECK: fcmp {{s[0-9]+}}, {{s[0-9]+}} 28; CHECK-NEXT: b.eq .[[T4:LBB[0-9]+_[0-9]+]] 29; CHECK-NEXT: b.vs .[[T4]] 30t4: 31 %tst4 = fcmp uge float %a, -0.0 32 br i1 %tst4, label %t5, label %end 33; CHECK-NOT: fcmp {{s[0-9]+}}, #0.0 34; CHECK: b.mi .LBB 35 36t5: 37 call void @bar(i32 0) 38 ret void 39end: 40 ret void 41 42} 43 44define void @test_double(double %a, double %b) { 45; CHECK-LABEL: test_double: 46 47 %tst1 = fcmp oeq double %a, %b 48 br i1 %tst1, label %end, label %t2 49; CHECK: fcmp {{d[0-9]+}}, {{d[0-9]+}} 50; CHECK: b.eq .L 51 52t2: 53 %tst2 = fcmp une double %b, 0.0 54 br i1 %tst2, label %t3, label %end 55; CHECK: fcmp {{d[0-9]+}}, #0.0 56; CHECK: b.eq .L 57 58 59t3: 60; This test can't be implemented with just one A64 conditional 61; branch. LLVM converts "ordered and not equal" to "unordered or 62; equal" before instruction selection, which is what we currently 63; test. Obviously, other sequences are valid. 64 %tst3 = fcmp one double %a, %b 65 br i1 %tst3, label %t4, label %end 66; CHECK: fcmp {{d[0-9]+}}, {{d[0-9]+}} 67; CHECK-NEXT: b.eq .[[T4:LBB[0-9]+_[0-9]+]] 68; CHECK-NEXT: b.vs .[[T4]] 69t4: 70 %tst4 = fcmp uge double %a, -0.0 71 br i1 %tst4, label %t5, label %end 72; CHECK-NOT: fcmp {{d[0-9]+}}, #0.0 73; CHECK: b.mi .LBB 74 75t5: 76 call void @bar(i32 0) 77 ret void 78end: 79 ret void 80 81} 82