1; RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=SI --check-prefix=FUNC %s 2; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=SI --check-prefix=FUNC %s 3 4; FUNC-LABEL: {{^}}break_inserted_outside_of_loop: 5 6; SI: [[LOOP_LABEL:[A-Z0-9]+]]: 7; Lowered break instructin: 8; SI: s_or_b64 9; Lowered Loop instruction: 10; SI: s_andn2_b64 11; s_cbranch_execnz [[LOOP_LABEL]] 12; SI: s_endpgm 13define void @break_inserted_outside_of_loop(i32 addrspace(1)* %out, i32 %a) { 14main_body: 15 %tid = call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0) #0 16 %0 = and i32 %a, %tid 17 %1 = trunc i32 %0 to i1 18 br label %ENDIF 19 20ENDLOOP: 21 store i32 0, i32 addrspace(1)* %out 22 ret void 23 24ENDIF: 25 br i1 %1, label %ENDLOOP, label %ENDIF 26} 27 28 29; FUNC-LABEL: {{^}}phi_cond_outside_loop: 30; FIXME: This could be folded into the s_or_b64 instruction 31; SI: s_mov_b64 [[ZERO:s\[[0-9]+:[0-9]+\]]], 0 32; SI: [[LOOP_LABEL:[A-Z0-9]+]] 33; SI: v_cmp_ne_i32_e32 vcc, 0, v{{[0-9]+}} 34 35; SI_IF_BREAK instruction: 36; SI: s_or_b64 [[BREAK:s\[[0-9]+:[0-9]+\]]], vcc, [[ZERO]] 37 38; SI_LOOP instruction: 39; SI: s_andn2_b64 exec, exec, [[BREAK]] 40; SI: s_cbranch_execnz [[LOOP_LABEL]] 41; SI: s_endpgm 42 43define void @phi_cond_outside_loop(i32 %b) { 44entry: 45 %tid = call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0) #0 46 %0 = icmp eq i32 %tid , 0 47 br i1 %0, label %if, label %else 48 49if: 50 br label %endif 51 52else: 53 %1 = icmp eq i32 %b, 0 54 br label %endif 55 56endif: 57 %2 = phi i1 [0, %if], [%1, %else] 58 br label %loop 59 60loop: 61 br i1 %2, label %exit, label %loop 62 63exit: 64 ret void 65} 66 67; FIXME: should emit s_endpgm 68; CHECK-LABEL: {{^}}switch_unreachable: 69; CHECK-NOT: s_endpgm 70; CHECK: .Lfunc_end2 71define void @switch_unreachable(i32 addrspace(1)* %g, i8 addrspace(3)* %l, i32 %x) nounwind { 72centry: 73 switch i32 %x, label %sw.default [ 74 i32 0, label %sw.bb 75 i32 60, label %sw.bb 76 ] 77 78sw.bb: 79 unreachable 80 81sw.default: 82 unreachable 83 84sw.epilog: 85 ret void 86} 87 88declare float @llvm.fabs.f32(float) nounwind readnone 89 90; This broke the old AMDIL cfg structurizer 91; FUNC-LABEL: {{^}}loop_land_info_assert: 92; SI: s_cmp_gt_i32 93; SI-NEXT: s_cbranch_scc0 [[ENDPGM:BB[0-9]+_[0-9]+]] 94 95; SI: s_cmp_gt_i32 96; SI-NEXT: s_cbranch_scc1 [[ENDPGM]] 97 98; SI: [[INFLOOP:BB[0-9]+_[0-9]+]] 99; SI: s_branch [[INFLOOP]] 100 101; SI: [[ENDPGM]]: 102; SI: s_endpgm 103define void @loop_land_info_assert(i32 %c0, i32 %c1, i32 %c2, i32 %c3, i32 %x, i32 %y, i1 %arg) nounwind { 104entry: 105 %cmp = icmp sgt i32 %c0, 0 106 br label %while.cond.outer 107 108while.cond.outer: 109 %tmp = load float, float addrspace(1)* undef 110 br label %while.cond 111 112while.cond: 113 %cmp1 = icmp slt i32 %c1, 4 114 br i1 %cmp1, label %convex.exit, label %for.cond 115 116convex.exit: 117 %or = or i1 %cmp, %cmp1 118 br i1 %or, label %return, label %if.end 119 120if.end: 121 %tmp3 = call float @llvm.fabs.f32(float %tmp) nounwind readnone 122 %cmp2 = fcmp olt float %tmp3, 0x3E80000000000000 123 br i1 %cmp2, label %if.else, label %while.cond.outer 124 125if.else: 126 store volatile i32 3, i32 addrspace(1)* undef, align 4 127 br label %while.cond 128 129for.cond: 130 %cmp3 = icmp slt i32 %c3, 1000 131 br i1 %cmp3, label %for.body, label %return 132 133for.body: 134 br i1 %cmp3, label %self.loop, label %if.end.2 135 136if.end.2: 137 %or.cond2 = or i1 %cmp3, %arg 138 br i1 %or.cond2, label %return, label %for.cond 139 140self.loop: 141 br label %self.loop 142 143return: 144 ret void 145} 146 147 148declare i32 @llvm.amdgcn.mbcnt.lo(i32, i32) #0 149 150attributes #0 = { nounwind readnone } 151