1; RUN: llc -march=mipsel -relocation-model=pic -O0 \ 2; RUN: -fast-isel-abort=1 -mcpu=mips32r2 < %s | FileCheck %s 3; RUN: llc -march=mipsel -relocation-model=pic -O0 \ 4; RUN: -fast-isel-abort=1 -mcpu=mips32 < %s | FileCheck %s 5 6@s1 = global i16 -89, align 2 7@s2 = global i16 4, align 2 8@us1 = global i16 -503, align 2 9@us2 = global i16 5, align 2 10@s3 = common global i16 0, align 2 11@us3 = common global i16 0, align 2 12 13define void @sll() { 14entry: 15 %0 = load i16, i16* @s1, align 2 16 %1 = load i16, i16* @s2, align 2 17 %shl = shl i16 %0, %1 18 store i16 %shl, i16* @s3, align 2 19; CHECK-LABEL: sll: 20; CHECK: lui $[[REG_GPa:[0-9]+]], %hi(_gp_disp) 21; CHECK-DAG: addiu $[[REG_GPb:[0-9]+]], $[[REG_GPa]], %lo(_gp_disp) 22; CHECK-DAG: addu $[[REG_GP:[0-9]+]], $[[REG_GPb]], $25 23; CHECK-DAG: lw $[[S3_ADDR:[0-9]+]], %got(s3)($[[REG_GP]]) 24; CHECK-DAG: lw $[[S2_ADDR:[0-9]+]], %got(s2)($[[REG_GP]]) 25; CHECK-DAG: lw $[[S1_ADDR:[0-9]+]], %got(s1)($[[REG_GP]]) 26; CHECK-DAG: lhu $[[S1:[0-9]+]], 0($[[S1_ADDR]]) 27; CHECK-DAG: lhu $[[S2:[0-9]+]], 0($[[S2_ADDR]]) 28; CHECK: sllv $[[RES:[0-9]+]], $[[S1]], $[[S2]] 29; CHECK: sh $[[RES]], 0($[[S3_ADDR]]) 30 ret void 31} 32 33define void @slli() { 34entry: 35 %0 = load i16, i16* @s1, align 2 36 %shl = shl i16 %0, 5 37 store i16 %shl, i16* @s3, align 2 38; CHECK-LABEL: slli: 39; CHECK: lui $[[REG_GPa:[0-9]+]], %hi(_gp_disp) 40; CHECK-DAG: addiu $[[REG_GPb:[0-9]+]], $[[REG_GPa]], %lo(_gp_disp) 41; CHECK-DAG: addu $[[REG_GP:[0-9]+]], $[[REG_GPb]], $25 42; CHECK-DAG: lw $[[S3_ADDR:[0-9]+]], %got(s3)($[[REG_GP]]) 43; CHECK-DAG: lw $[[S1_ADDR:[0-9]+]], %got(s1)($[[REG_GP]]) 44; CHECK-DAG: lhu $[[S1:[0-9]+]], 0($[[S1_ADDR]]) 45; CHECK: sll $[[RES:[0-9]+]], $[[S1]], 5 46; CHECK: sh $[[RES]], 0($[[S3_ADDR]]) 47 ret void 48} 49 50define void @srl() { 51entry: 52 %0 = load i16, i16* @us1, align 2 53 %1 = load i16, i16* @us2, align 2 54 %shr = lshr i16 %0, %1 55 store i16 %shr, i16* @us3, align 2 56 ret void 57; CHECK-LABEL: srl: 58; CHECK: lui $[[REG_GPa:[0-9]+]], %hi(_gp_disp) 59; CHECK-DAG: addiu $[[REG_GPb:[0-9]+]], $[[REG_GPa]], %lo(_gp_disp) 60; CHECK-DAG: addu $[[REG_GP:[0-9]+]], $[[REG_GPb]], $25 61; CHECK-DAG: lw $[[US3_ADDR:[0-9]+]], %got(us3)($[[REG_GP]]) 62; CHECK-DAG: lw $[[US2_ADDR:[0-9]+]], %got(us2)($[[REG_GP]]) 63; CHECK-DAG: lw $[[US1_ADDR:[0-9]+]], %got(us1)($[[REG_GP]]) 64; CHECK-DAG: lhu $[[US1:[0-9]+]], 0($[[US1_ADDR]]) 65; CHECK-DAG: lhu $[[US2:[0-9]+]], 0($[[US2_ADDR]]) 66; CHECK: srlv $[[RES:[0-9]+]], $[[US1]], $[[US2]] 67; CHECK: sh $[[RES]], 0($[[S3_ADDR]]) 68} 69 70define void @srli() { 71entry: 72 %0 = load i16, i16* @us1, align 2 73 %shr = lshr i16 %0, 4 74 store i16 %shr, i16* @us3, align 2 75; CHECK-LABEL: srli: 76; CHECK: lui $[[REG_GPa:[0-9]+]], %hi(_gp_disp) 77; CHECK-DAG: addiu $[[REG_GPb:[0-9]+]], $[[REG_GPa]], %lo(_gp_disp) 78; CHECK-DAG: addu $[[REG_GP:[0-9]+]], $[[REG_GPb]], $25 79; CHECK-DAG: lw $[[US3_ADDR:[0-9]+]], %got(us3)($[[REG_GP]]) 80; CHECK-DAG: lw $[[US1_ADDR:[0-9]+]], %got(us1)($[[REG_GP]]) 81; CHECK-DAG: lhu $[[US1:[0-9]+]], 0($[[US1_ADDR]]) 82; CHECK: srl $[[RES:[0-9]+]], $[[US1]], 4 83; CHECK: sh $[[RES]], 0($[[S3_ADDR]]) 84 ret void 85} 86 87define void @sra() { 88entry: 89 %0 = load i16, i16* @s1, align 2 90 %1 = load i16, i16* @s2, align 2 91 %shr = ashr i16 %0, %1 92 store i16 %shr, i16* @s3, align 2 93; CHECK-LABEL: sra: 94; CHECK: lui $[[REG_GPa:[0-9]+]], %hi(_gp_disp) 95; CHECK-DAG: addiu $[[REG_GPb:[0-9]+]], $[[REG_GPa]], %lo(_gp_disp) 96; CHECK-DAG: addu $[[REG_GP:[0-9]+]], $[[REG_GPb]], $25 97; CHECK-DAG: lw $[[S3_ADDR:[0-9]+]], %got(s3)($[[REG_GP]]) 98; CHECK-DAG: lw $[[S2_ADDR:[0-9]+]], %got(s2)($[[REG_GP]]) 99; CHECK-DAG: lw $[[S1_ADDR:[0-9]+]], %got(s1)($[[REG_GP]]) 100; CHECK-DAG: lhu $[[S1:[0-9]+]], 0($[[S1_ADDR]]) 101; CHECK-DAG: lhu $[[S2:[0-9]+]], 0($[[S2_ADDR]]) 102; CHECK: srav $[[RES:[0-9]+]], $[[S1]], $[[S2]] 103; CHECK: sh $[[RES]], 0($[[S3_ADDR]]) 104 ret void 105} 106 107define void @srai() { 108entry: 109 %0 = load i16, i16* @s1, align 2 110 %shr = ashr i16 %0, 2 111 store i16 %shr, i16* @s3, align 2 112; CHECK-LABEL: srai: 113; CHECK: lui $[[REG_GPa:[0-9]+]], %hi(_gp_disp) 114; CHECK-DAG: addiu $[[REG_GPb:[0-9]+]], $[[REG_GPa]], %lo(_gp_disp) 115; CHECK-DAG: addu $[[REG_GP:[0-9]+]], $[[REG_GPb]], $25 116; CHECK-DAG: lw $[[S3_ADDR:[0-9]+]], %got(s3)($[[REG_GP]]) 117; CHECK-DAG: lw $[[S1_ADDR:[0-9]+]], %got(s1)($[[REG_GP]]) 118; CHECK-DAG: lhu $[[S1:[0-9]+]], 0($[[S1_ADDR]]) 119; CHECK: sra $[[RES:[0-9]+]], $[[S1]], 2 120; CHECK: sh $[[RES]], 0($[[S3_ADDR]]) 121 ret void 122} 123