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1; RUN: llc < %s -mcpu=pwr8 | FileCheck %s
2
3target datalayout = "e-m:e-i64:64-n32:64"
4target triple = "powerpc64le-unknown-linux-gnu"
5
6; Function Attrs: nounwind
7; Check that we accept 'U' and 'X' constraints.
8; Generated from following C code:
9;
10; void foo (int result, char *addr) {
11;   __asm__ __volatile__ (
12;     "ld%U1%X1 %0,%1\n"
13;     "cmpw %0,%0\n"
14;     "bne- 1f\n"
15;     "1: isync\n"
16;     : "=r" (result)
17;     : "m"(*addr) : "memory", "cr0");
18; }
19
20define void @foo(i32 signext %result, i8* %addr) #0 {
21
22; CHECK-LABEL: @foo
23; CHECK: ld [[REG:[0-9]+]], 0(4)
24; CHECK: cmpw [[REG]], [[REG]]
25; CHECK: bne- 0, .Ltmp[[TMP:[0-9]+]]
26; CHECK: .Ltmp[[TMP]]:
27; CHECK: isync
28
29entry:
30  %result.addr = alloca i32, align 4
31  %addr.addr = alloca i8*, align 8
32  store i32 %result, i32* %result.addr, align 4
33  store i8* %addr, i8** %addr.addr, align 8
34  %0 = load i8*, i8** %addr.addr, align 8
35  %1 = call i32 asm sideeffect "ld${1:U}${1:X} $0,$1\0Acmpw $0,$0\0Abne- 1f\0A1: isync\0A", "=r,*m,~{memory},~{cr0}"(i8* %0) #1, !srcloc !0
36  store i32 %1, i32* %result.addr, align 4
37  ret void
38}
39
40; Function Attrs: nounwind
41; Check that we accept the 'd' constraint.
42; Generated from the following C code:
43; int foo(double x) {
44;   int64_t result;
45;   __asm__ __volatile__("fctid %0, %1"
46;                        : "=d"(result)
47;                        : "d"(x)
48;                        : /* No clobbers */);
49;   return result;
50; }
51define signext i32 @bar(double %x) #0 {
52
53; CHECK-LABEL: @bar
54; CHECK: fctid 0, 1
55entry:
56  %x.addr = alloca double, align 8
57  %result = alloca i64, align 8
58  store double %x, double* %x.addr, align 8
59  %0 = load double, double* %x.addr, align 8
60  %1 = call i64 asm sideeffect "fctid $0, $1", "=d,d"(double %0) #1, !srcloc !1
61  store i64 %1, i64* %result, align 8
62  %2 = load i64, i64* %result, align 8
63  %conv = trunc i64 %2 to i32
64  ret i32 %conv
65}
66
67
68attributes #0 = { nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="ppc64le" "target-features"="+altivec,+bpermd,+crypto,+direct-move,+extdiv,+power8-vector,+vsx,-qpx" "unsafe-fp-math"="false" "use-soft-float"="false" }
69
70attributes #1 = { nounwind }
71
72!0 = !{i32 67, i32 91, i32 110, i32 126}
73!1 = !{i32 84}
74