1; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-linux-gnu -O3 < %s | FileCheck %s 2 3; These tests verify that VSX swap optimization works when loading a scalar 4; into a vector register. 5 6 7@x = global <2 x double> <double 9.970000e+01, double -1.032220e+02>, align 16 8@z = global <2 x double> <double 2.332000e+01, double 3.111111e+01>, align 16 9@y = global double 1.780000e+00, align 8 10 11define void @bar0() { 12entry: 13 %0 = load <2 x double>, <2 x double>* @x, align 16 14 %1 = load double, double* @y, align 8 15 %vecins = insertelement <2 x double> %0, double %1, i32 0 16 store <2 x double> %vecins, <2 x double>* @z, align 16 17 ret void 18} 19 20; CHECK-LABEL: @bar0 21; CHECK-DAG: lxvd2x [[REG1:[0-9]+]] 22; CHECK-DAG: lxsdx [[REG2:[0-9]+]] 23; CHECK: xxspltd [[REG4:[0-9]+]], [[REG2]], 0 24; CHECK: xxpermdi [[REG5:[0-9]+]], [[REG4]], [[REG1]], 1 25; CHECK: stxvd2x [[REG5]] 26 27define void @bar1() { 28entry: 29 %0 = load <2 x double>, <2 x double>* @x, align 16 30 %1 = load double, double* @y, align 8 31 %vecins = insertelement <2 x double> %0, double %1, i32 1 32 store <2 x double> %vecins, <2 x double>* @z, align 16 33 ret void 34} 35 36; CHECK-LABEL: @bar1 37; CHECK-DAG: lxvd2x [[REG1:[0-9]+]] 38; CHECK-DAG: lxsdx [[REG2:[0-9]+]] 39; CHECK: xxspltd [[REG4:[0-9]+]], [[REG2]], 0 40; CHECK: xxmrghd [[REG5:[0-9]+]], [[REG1]], [[REG4]] 41; CHECK: stxvd2x [[REG5]] 42 43