1; RUN: llc < %s -march=ppc32 -mcpu=g5 -o %t 2; RUN: grep vrlw %t 3; RUN: not grep spr %t 4; RUN: not grep vrsave %t 5 6define <4 x i32> @test_rol() { 7 ret <4 x i32> < i32 -11534337, i32 -11534337, i32 -11534337, i32 -11534337 > 8} 9 10define <4 x i32> @test_arg(<4 x i32> %A, <4 x i32> %B) { 11 %C = add <4 x i32> %A, %B ; <<4 x i32>> [#uses=1] 12 ret <4 x i32> %C 13} 14 15