1; Test vector replicates that use VECTOR GENERATE MASK, v8i16 version. 2; 3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s 4 5; Test a word-granularity replicate with the lowest value that cannot use 6; VREPIF. 7define <8 x i16> @f1() { 8; CHECK-LABEL: f1: 9; CHECK: vgmf %v24, 16, 16 10; CHECK: br %r14 11 ret <8 x i16> <i16 0, i16 32768, i16 0, i16 32768, 12 i16 0, i16 32768, i16 0, i16 32768> 13} 14 15; Test a word-granularity replicate that has the lower 17 bits set. 16define <8 x i16> @f2() { 17; CHECK-LABEL: f2: 18; CHECK: vgmf %v24, 15, 31 19; CHECK: br %r14 20 ret <8 x i16> <i16 1, i16 -1, i16 1, i16 -1, 21 i16 1, i16 -1, i16 1, i16 -1> 22} 23 24; Test a word-granularity replicate that has the upper 15 bits set. 25define <8 x i16> @f3() { 26; CHECK-LABEL: f3: 27; CHECK: vgmf %v24, 0, 14 28; CHECK: br %r14 29 ret <8 x i16> <i16 -2, i16 0, i16 -2, i16 0, 30 i16 -2, i16 0, i16 -2, i16 0> 31} 32 33; Test a word-granularity replicate that has middle bits set. 34define <8 x i16> @f4() { 35; CHECK-LABEL: f4: 36; CHECK: vgmf %v24, 12, 17 37; CHECK: br %r14 38 ret <8 x i16> <i16 15, i16 49152, i16 15, i16 49152, 39 i16 15, i16 49152, i16 15, i16 49152> 40} 41 42; Test a word-granularity replicate with a wrap-around mask. 43define <8 x i16> @f5() { 44; CHECK-LABEL: f5: 45; CHECK: vgmf %v24, 17, 15 46; CHECK: br %r14 47 ret <8 x i16> <i16 -1, i16 32767, i16 -1, i16 32767, 48 i16 -1, i16 32767, i16 -1, i16 32767> 49} 50 51; Test a doubleword-granularity replicate with the lowest value that cannot 52; use VREPIG. 53define <8 x i16> @f6() { 54; CHECK-LABEL: f6: 55; CHECK: vgmg %v24, 48, 48 56; CHECK: br %r14 57 ret <8 x i16> <i16 0, i16 0, i16 0, i16 32768, 58 i16 0, i16 0, i16 0, i16 32768> 59} 60 61; Test a doubleword-granularity replicate that has the lower 22 bits set. 62define <8 x i16> @f7() { 63; CHECK-LABEL: f7: 64; CHECK: vgmg %v24, 42, 63 65; CHECK: br %r14 66 ret <8 x i16> <i16 0, i16 0, i16 63, i16 -1, 67 i16 0, i16 0, i16 63, i16 -1> 68} 69 70; Test a doubleword-granularity replicate that has the upper 45 bits set. 71define <8 x i16> @f8() { 72; CHECK-LABEL: f8: 73; CHECK: vgmg %v24, 0, 44 74; CHECK: br %r14 75 ret <8 x i16> <i16 -1, i16 -1, i16 -8, i16 0, 76 i16 -1, i16 -1, i16 -8, i16 0> 77} 78 79; Test a doubleword-granularity replicate that has middle bits set. 80define <8 x i16> @f9() { 81; CHECK-LABEL: f9: 82; CHECK: vgmg %v24, 31, 42 83; CHECK: br %r14 84 ret <8 x i16> <i16 0, i16 1, i16 -32, i16 0, 85 i16 0, i16 1, i16 -32, i16 0> 86} 87 88; Test a doubleword-granularity replicate with a wrap-around mask. 89define <8 x i16> @f10() { 90; CHECK-LABEL: f10: 91; CHECK: vgmg %v24, 18, 0 92; CHECK: br %r14 93 ret <8 x i16> <i16 32768, i16 16383, i16 -1, i16 -1, 94 i16 32768, i16 16383, i16 -1, i16 -1> 95} 96 97; Retest f1 with arbitrary undefs instead of 0s. 98define <8 x i16> @f11() { 99; CHECK-LABEL: f11: 100; CHECK: vgmf %v24, 16, 16 101; CHECK: br %r14 102 ret <8 x i16> <i16 undef, i16 32768, i16 0, i16 32768, 103 i16 0, i16 32768, i16 undef, i16 32768> 104} 105 106; ...likewise f9. 107define <8 x i16> @f12() { 108; CHECK-LABEL: f12: 109; CHECK: vgmg %v24, 31, 42 110; CHECK: br %r14 111 ret <8 x i16> <i16 undef, i16 1, i16 -32, i16 0, 112 i16 0, i16 1, i16 -32, i16 undef> 113} 114