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1; RUN: llc < %s -mtriple=thumbv7s-apple-ios6.0.0 -verify-machineinstrs
2
3; Check to make sure the tail-call return at the end doesn't use a
4; callee-saved register. Register hinting from t2LDRDri was getting this
5; wrong. The intervening call will force allocation to try a high register
6; first, so the hint will attempt to fire, but must be rejected due to
7; not being in the allocation order for the tcGPR register class.
8; The machine instruction verifier will make sure that all actually worked
9; out the way it's supposed to.
10
11%"myclass" = type { %struct.foo }
12%struct.foo = type { i32, [40 x i8] }
13
14define hidden void @func(i8* %Data) nounwind ssp {
15  %1 = getelementptr inbounds i8, i8* %Data, i32 12
16  %2 = bitcast i8* %1 to %"myclass"*
17  tail call void @abc(%"myclass"* %2) nounwind
18  tail call void @def(%"myclass"* %2) nounwind
19  %3 = getelementptr inbounds i8, i8* %Data, i32 8
20  %4 = bitcast i8* %3 to i8**
21  %5 = load i8*, i8** %4, align 4
22  tail call void @ghi(i8* %5) nounwind
23  %6 = bitcast i8* %Data to void (i8*)**
24  %7 = load void (i8*)*, void (i8*)** %6, align 4
25  %8 = getelementptr inbounds i8, i8* %Data, i32 4
26  %9 = bitcast i8* %8 to i8**
27  %10 = load i8*, i8** %9, align 4
28  %11 = icmp eq i8* %Data, null
29  br i1 %11, label %14, label %12
30
31; <label>:12                                      ; preds = %0
32  %13 = tail call %"myclass"* @jkl(%"myclass"* %2) nounwind
33  tail call void @mno(i8* %Data) nounwind
34  br label %14
35
36; <label>:14                                      ; preds = %12, %0
37  tail call void %7(i8* %10) nounwind
38  ret void
39}
40
41declare void @mno(i8*)
42
43declare void @def(%"myclass"*)
44
45declare void @abc(%"myclass"*)
46
47declare void @ghi(i8*)
48
49declare %"myclass"* @jkl(%"myclass"*) nounwind
50