1; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512vl | FileCheck %s 2 3; 256-bit 4 5; CHECK-LABEL: vpandd256 6; CHECK: vpandd %ymm 7; CHECK: ret 8define <8 x i32> @vpandd256(<8 x i32> %a, <8 x i32> %b) nounwind uwtable readnone ssp { 9entry: 10 ; Force the execution domain with an add. 11 %a2 = add <8 x i32> %a, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1> 12 %x = and <8 x i32> %a2, %b 13 ret <8 x i32> %x 14} 15 16; CHECK-LABEL: vpandnd256 17; CHECK: vpandnd %ymm 18; CHECK: ret 19define <8 x i32> @vpandnd256(<8 x i32> %a, <8 x i32> %b) nounwind uwtable readnone ssp { 20entry: 21 ; Force the execution domain with an add. 22 %a2 = add <8 x i32> %a, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1> 23 %b2 = xor <8 x i32> %a, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1> 24 %x = and <8 x i32> %a2, %b2 25 ret <8 x i32> %x 26} 27 28; CHECK-LABEL: vpord256 29; CHECK: vpord %ymm 30; CHECK: ret 31define <8 x i32> @vpord256(<8 x i32> %a, <8 x i32> %b) nounwind uwtable readnone ssp { 32entry: 33 ; Force the execution domain with an add. 34 %a2 = add <8 x i32> %a, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1> 35 %x = or <8 x i32> %a2, %b 36 ret <8 x i32> %x 37} 38 39; CHECK-LABEL: vpxord256 40; CHECK: vpxord %ymm 41; CHECK: ret 42define <8 x i32> @vpxord256(<8 x i32> %a, <8 x i32> %b) nounwind uwtable readnone ssp { 43entry: 44 ; Force the execution domain with an add. 45 %a2 = add <8 x i32> %a, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1> 46 %x = xor <8 x i32> %a2, %b 47 ret <8 x i32> %x 48} 49 50; CHECK-LABEL: vpandq256 51; CHECK: vpandq %ymm 52; CHECK: ret 53define <4 x i64> @vpandq256(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp { 54entry: 55 ; Force the execution domain with an add. 56 %a2 = add <4 x i64> %a, <i64 1, i64 1, i64 1, i64 1> 57 %x = and <4 x i64> %a2, %b 58 ret <4 x i64> %x 59} 60 61; CHECK-LABEL: vpandnq256 62; CHECK: vpandnq %ymm 63; CHECK: ret 64define <4 x i64> @vpandnq256(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp { 65entry: 66 ; Force the execution domain with an add. 67 %a2 = add <4 x i64> %a, <i64 1, i64 1, i64 1, i64 1> 68 %b2 = xor <4 x i64> %b, <i64 -1, i64 -1, i64 -1, i64 -1> 69 %x = and <4 x i64> %a2, %b2 70 ret <4 x i64> %x 71} 72 73; CHECK-LABEL: vporq256 74; CHECK: vporq %ymm 75; CHECK: ret 76define <4 x i64> @vporq256(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp { 77entry: 78 ; Force the execution domain with an add. 79 %a2 = add <4 x i64> %a, <i64 1, i64 1, i64 1, i64 1> 80 %x = or <4 x i64> %a2, %b 81 ret <4 x i64> %x 82} 83 84; CHECK-LABEL: vpxorq256 85; CHECK: vpxorq %ymm 86; CHECK: ret 87define <4 x i64> @vpxorq256(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp { 88entry: 89 ; Force the execution domain with an add. 90 %a2 = add <4 x i64> %a, <i64 1, i64 1, i64 1, i64 1> 91 %x = xor <4 x i64> %a2, %b 92 ret <4 x i64> %x 93} 94 95; 128-bit 96 97; CHECK-LABEL: vpandd128 98; CHECK: vpandd %xmm 99; CHECK: ret 100define <4 x i32> @vpandd128(<4 x i32> %a, <4 x i32> %b) nounwind uwtable readnone ssp { 101entry: 102 ; Force the execution domain with an add. 103 %a2 = add <4 x i32> %a, <i32 1, i32 1, i32 1, i32 1> 104 %x = and <4 x i32> %a2, %b 105 ret <4 x i32> %x 106} 107 108; CHECK-LABEL: vpandnd128 109; CHECK: vpandnd %xmm 110; CHECK: ret 111define <4 x i32> @vpandnd128(<4 x i32> %a, <4 x i32> %b) nounwind uwtable readnone ssp { 112entry: 113 ; Force the execution domain with an add. 114 %a2 = add <4 x i32> %a, <i32 1, i32 1, i32 1, i32 1> 115 %b2 = xor <4 x i32> %b, <i32 -1, i32 -1, i32 -1, i32 -1> 116 %x = and <4 x i32> %a2, %b2 117 ret <4 x i32> %x 118} 119 120; CHECK-LABEL: vpord128 121; CHECK: vpord %xmm 122; CHECK: ret 123define <4 x i32> @vpord128(<4 x i32> %a, <4 x i32> %b) nounwind uwtable readnone ssp { 124entry: 125 ; Force the execution domain with an add. 126 %a2 = add <4 x i32> %a, <i32 1, i32 1, i32 1, i32 1> 127 %x = or <4 x i32> %a2, %b 128 ret <4 x i32> %x 129} 130 131; CHECK-LABEL: vpxord128 132; CHECK: vpxord %xmm 133; CHECK: ret 134define <4 x i32> @vpxord128(<4 x i32> %a, <4 x i32> %b) nounwind uwtable readnone ssp { 135entry: 136 ; Force the execution domain with an add. 137 %a2 = add <4 x i32> %a, <i32 1, i32 1, i32 1, i32 1> 138 %x = xor <4 x i32> %a2, %b 139 ret <4 x i32> %x 140} 141 142; CHECK-LABEL: vpandq128 143; CHECK: vpandq %xmm 144; CHECK: ret 145define <2 x i64> @vpandq128(<2 x i64> %a, <2 x i64> %b) nounwind uwtable readnone ssp { 146entry: 147 ; Force the execution domain with an add. 148 %a2 = add <2 x i64> %a, <i64 1, i64 1> 149 %x = and <2 x i64> %a2, %b 150 ret <2 x i64> %x 151} 152 153; CHECK-LABEL: vpandnq128 154; CHECK: vpandnq %xmm 155; CHECK: ret 156define <2 x i64> @vpandnq128(<2 x i64> %a, <2 x i64> %b) nounwind uwtable readnone ssp { 157entry: 158 ; Force the execution domain with an add. 159 %a2 = add <2 x i64> %a, <i64 1, i64 1> 160 %b2 = xor <2 x i64> %b, <i64 -1, i64 -1> 161 %x = and <2 x i64> %a2, %b2 162 ret <2 x i64> %x 163} 164 165; CHECK-LABEL: vporq128 166; CHECK: vporq %xmm 167; CHECK: ret 168define <2 x i64> @vporq128(<2 x i64> %a, <2 x i64> %b) nounwind uwtable readnone ssp { 169entry: 170 ; Force the execution domain with an add. 171 %a2 = add <2 x i64> %a, <i64 1, i64 1> 172 %x = or <2 x i64> %a2, %b 173 ret <2 x i64> %x 174} 175 176; CHECK-LABEL: vpxorq128 177; CHECK: vpxorq %xmm 178; CHECK: ret 179define <2 x i64> @vpxorq128(<2 x i64> %a, <2 x i64> %b) nounwind uwtable readnone ssp { 180entry: 181 ; Force the execution domain with an add. 182 %a2 = add <2 x i64> %a, <i64 1, i64 1> 183 %x = xor <2 x i64> %a2, %b 184 ret <2 x i64> %x 185} 186