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1; RUN: llc < %s -march=x86-64 -mattr=-bmi | FileCheck %s
2
3; Use h-register extract and zero-extend.
4
5define double @foo8(double* nocapture inreg %p, i64 inreg %x) nounwind readonly {
6  %t0 = lshr i64 %x, 8
7  %t1 = and i64 %t0, 255
8  %t2 = getelementptr double, double* %p, i64 %t1
9  %t3 = load double, double* %t2, align 8
10  ret double %t3
11}
12; CHECK: foo8:
13; CHECK: movzbl %{{[abcd]}}h, %e
14
15define float @foo4(float* nocapture inreg %p, i64 inreg %x) nounwind readonly {
16  %t0 = lshr i64 %x, 8
17  %t1 = and i64 %t0, 255
18  %t2 = getelementptr float, float* %p, i64 %t1
19  %t3 = load float, float* %t2, align 8
20  ret float %t3
21}
22; CHECK: foo4:
23; CHECK: movzbl %{{[abcd]}}h, %e
24
25define i16 @foo2(i16* nocapture inreg %p, i64 inreg %x) nounwind readonly {
26  %t0 = lshr i64 %x, 8
27  %t1 = and i64 %t0, 255
28  %t2 = getelementptr i16, i16* %p, i64 %t1
29  %t3 = load i16, i16* %t2, align 8
30  ret i16 %t3
31}
32; CHECK: foo2:
33; CHECK: movzbl %{{[abcd]}}h, %e
34
35define i8 @foo1(i8* nocapture inreg %p, i64 inreg %x) nounwind readonly {
36  %t0 = lshr i64 %x, 8
37  %t1 = and i64 %t0, 255
38  %t2 = getelementptr i8, i8* %p, i64 %t1
39  %t3 = load i8, i8* %t2, align 8
40  ret i8 %t3
41}
42; CHECK: foo1:
43; CHECK: movzbl %{{[abcd]}}h, %e
44
45define i8 @bar8(i8* nocapture inreg %p, i64 inreg %x) nounwind readonly {
46  %t0 = lshr i64 %x, 5
47  %t1 = and i64 %t0, 2040
48  %t2 = getelementptr i8, i8* %p, i64 %t1
49  %t3 = load i8, i8* %t2, align 8
50  ret i8 %t3
51}
52; CHECK: bar8:
53; CHECK: movzbl %{{[abcd]}}h, %e
54
55define i8 @bar4(i8* nocapture inreg %p, i64 inreg %x) nounwind readonly {
56  %t0 = lshr i64 %x, 6
57  %t1 = and i64 %t0, 1020
58  %t2 = getelementptr i8, i8* %p, i64 %t1
59  %t3 = load i8, i8* %t2, align 8
60  ret i8 %t3
61}
62; CHECK: bar4:
63; CHECK: movzbl %{{[abcd]}}h, %e
64
65define i8 @bar2(i8* nocapture inreg %p, i64 inreg %x) nounwind readonly {
66  %t0 = lshr i64 %x, 7
67  %t1 = and i64 %t0, 510
68  %t2 = getelementptr i8, i8* %p, i64 %t1
69  %t3 = load i8, i8* %t2, align 8
70  ret i8 %t3
71}
72; CHECK: bar2:
73; CHECK: movzbl %{{[abcd]}}h, %e
74; CHECK: ret
75