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1; RUN: llc < %s -march=x86-64 -mcpu=corei7 -debug
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3; REQUIRES: asserts
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5; Test that the dag combiner doesn't assert if we try to replace a sequence of two
6; v4f32 X86ISD::PSHUFD nodes with a single PSHUFD.
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9define <4 x float> @test(<4 x float> %V) {
10  %1 = shufflevector <4 x float> %V, <4 x float> undef, <4 x i32> <i32 3, i32 0, i32 2, i32 1>
11  %2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 3, i32 0, i32 2, i32 1>
12  ret <4 x float> %2
13}
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