1; RUN: llc -march=xcore < %s | FileCheck %s 2 3; Only needs one ladd 4define i64 @f1(i32 %x, i32 %y) nounwind { 5entry: 6 %0 = zext i32 %x to i64 ; <i64> [#uses=1] 7 %1 = zext i32 %y to i64 ; <i64> [#uses=1] 8 %2 = add i64 %1, %0 ; <i64> [#uses=1] 9 ret i64 %2 10} 11; CHECK-LABEL: f1: 12; CHECK: ldc r2, 0 13; CHECK-NEXT: ladd r1, r0, r1, r0, r2 14; CHECK-NEXT: retsp 0 15 16; Only needs one lsub and one neg 17define i64 @f2(i32 %x, i32 %y) nounwind { 18entry: 19 %0 = zext i32 %x to i64 ; <i64> [#uses=1] 20 %1 = zext i32 %y to i64 ; <i64> [#uses=1] 21 %2 = sub i64 %1, %0 ; <i64> [#uses=1] 22 ret i64 %2 23} 24; CHECK-LABEL: f2: 25; CHECK: ldc r2, 0 26; CHECK-NEXT: lsub r1, r0, r1, r0, r2 27; CHECK-NEXT: neg r1, r1 28; CHECK-NEXT: retsp 0 29 30; Should compile to one ladd and one add 31define i64 @f3(i64 %x, i32 %y) nounwind { 32entry: 33 %0 = zext i32 %y to i64 ; <i64> [#uses=1] 34 %1 = add i64 %x, %0 ; <i64> [#uses=1] 35 ret i64 %1 36} 37; CHECK-LABEL: f3: 38; CHECK: ldc r3, 0 39; CHECK-NEXT: ladd r2, r0, r0, r2, r3 40; CHECK-NEXT: add r1, r1, r2 41; CHECK-NEXT: retsp 0 42 43; Should compile to one ladd and one add 44define i64 @f4(i32 %x, i64 %y) nounwind { 45entry: 46 %0 = zext i32 %x to i64 ; <i64> [#uses=1] 47 %1 = add i64 %0, %y ; <i64> [#uses=1] 48 ret i64 %1 49} 50; CHECK-LABEL: f4: 51; CHECK: ldc r3, 0 52; CHECK-NEXT: ladd r1, r0, r0, r1, r3 53; CHECK-NEXT: add r1, r2, r1 54; CHECK-NEXT: retsp 0 55 56; Should compile to one lsub and one sub 57define i64 @f5(i64 %x, i32 %y) nounwind { 58entry: 59 %0 = zext i32 %y to i64 ; <i64> [#uses=1] 60 %1 = sub i64 %x, %0 ; <i64> [#uses=1] 61 ret i64 %1 62} 63; CHECK-LABEL: f5: 64; CHECK: ldc r3, 0 65; CHECK-NEXT: lsub r2, r0, r0, r2, r3 66; CHECK-NEXT: sub r1, r1, r2 67; CHECK-NEXT: retsp 0 68