1; RUN: %lli -force-interpreter=true %s > /dev/null 2 3define i32 @main() { 4 zext <2 x i1> <i1 true,i1 true> to <2 x i8> 5 zext <3 x i1> <i1 true,i1 true,i1 true> to <3 x i8> 6 zext <2 x i1> <i1 true,i1 true> to <2 x i16> 7 zext <3 x i1> <i1 true,i1 true,i1 true> to <3 x i16> 8 zext <2 x i1> <i1 true,i1 true> to <2 x i32> 9 zext <3 x i1> <i1 true,i1 true,i1 true> to <3 x i32> 10 zext <2 x i1> <i1 true,i1 true> to <2 x i64> 11 zext <3 x i1> <i1 true,i1 true,i1 true> to <3 x i64> 12 zext <3 x i8> <i8 4, i8 4, i8 4> to <3 x i16> 13 zext <2 x i8> <i8 -4, i8 -4> to <2 x i16> 14 zext <3 x i8> <i8 4, i8 4, i8 4> to <3 x i32> 15 zext <2 x i8> <i8 -4, i8 -4> to <2 x i32> 16 zext <3 x i8> <i8 4, i8 4, i8 4> to <3 x i64> 17 zext <2 x i8> <i8 -4, i8 -4> to <2 x i64> 18 zext <3 x i16> <i16 4, i16 4, i16 4> to <3 x i32> 19 zext <2 x i16> <i16 -4, i16 -4> to <2 x i32> 20 zext <3 x i16> <i16 4, i16 4, i16 4> to <3 x i64> 21 zext <2 x i16> <i16 -4, i16 -4> to <2 x i64> 22 zext <3 x i32> <i32 4, i32 4, i32 4> to <3 x i64> 23 zext <2 x i32> <i32 -4, i32 -4> to <2 x i64> 24 25 26 sext <2 x i1> <i1 true,i1 true> to <2 x i8> 27 sext <3 x i1> <i1 true,i1 false,i1 true> to <3 x i8> 28 sext <2 x i1> <i1 true,i1 true> to <2 x i16> 29 sext <3 x i1> <i1 true,i1 false,i1 true> to <3 x i16> 30 sext <2 x i1> <i1 true,i1 true> to <2 x i32> 31 sext <3 x i1> <i1 true,i1 false,i1 true> to <3 x i32> 32 sext <2 x i1> <i1 true,i1 true> to <2 x i64> 33 sext <3 x i1> <i1 true,i1 false,i1 true> to <3 x i64> 34 sext <3 x i8> <i8 -4, i8 0, i8 4> to <3 x i16> 35 sext <2 x i8> <i8 -4, i8 4> to <2 x i16> 36 sext <3 x i8> <i8 -4, i8 0, i8 4> to <3 x i32> 37 sext <2 x i8> <i8 -4, i8 4> to <2 x i32> 38 sext <3 x i8> <i8 -4, i8 0, i8 4> to <3 x i64> 39 sext <2 x i8> <i8 -4, i8 4> to <2 x i64> 40 sext <3 x i16> <i16 -4, i16 0, i16 4> to <3 x i32> 41 sext <2 x i16> <i16 -4, i16 4> to <2 x i32> 42 sext <3 x i16> <i16 -4, i16 0, i16 4> to <3 x i64> 43 sext <2 x i16> <i16 -4, i16 4> to <2 x i64> 44 sext <3 x i32> <i32 -4, i32 0, i32 4> to <3 x i64> 45 sext <2 x i32> <i32 -4, i32 4> to <2 x i64> 46 47 48 uitofp <3 x i1> <i1 true,i1 false,i1 true> to <3 x float> 49 uitofp <2 x i1> <i1 true,i1 true> to <2 x double> 50 uitofp <3 x i8> <i8 -4,i8 0,i8 4> to <3 x float> 51 uitofp <2 x i8> <i8 -4,i8 4> to <2 x double> 52 uitofp <3 x i16> <i16 -4,i16 0,i16 4> to <3 x float> 53 uitofp <2 x i16> <i16 -4,i16 4> to <2 x double> 54 uitofp <3 x i32> <i32 -4,i32 0,i32 4> to <3 x float> 55 uitofp <2 x i32> <i32 -4,i32 4> to <2 x double> 56 uitofp <3 x i64> <i64 -4,i64 0,i64 4> to <3 x float> 57 uitofp <2 x i64> <i64 -4,i64 4> to <2 x double> 58 59 60 sitofp <3 x i1> <i1 true,i1 false,i1 true> to <3 x float> 61 sitofp <2 x i1> <i1 true,i1 true> to <2 x double> 62 sitofp <3 x i8> <i8 -4,i8 0,i8 4> to <3 x float> 63 sitofp <2 x i8> <i8 -4,i8 4> to <2 x double> 64 sitofp <3 x i16> <i16 -4,i16 0,i16 4> to <3 x float> 65 sitofp <2 x i16> <i16 -4,i16 4> to <2 x double> 66 sitofp <3 x i32> <i32 -4,i32 0,i32 4> to <3 x float> 67 sitofp <2 x i32> <i32 -4,i32 4> to <2 x double> 68 sitofp <3 x i64> <i64 -4,i64 0,i64 4> to <3 x float> 69 sitofp <2 x i64> <i64 -4,i64 4> to <2 x double> 70 71 trunc <2 x i16> <i16 -6, i16 6> to <2 x i8> 72 trunc <3 x i16> <i16 -6, i16 6, i16 0> to <3 x i8> 73 trunc <2 x i32> <i32 -6, i32 6> to <2 x i8> 74 trunc <3 x i32> <i32 -6, i32 6, i32 0> to <3 x i8> 75 trunc <2 x i32> <i32 -6, i32 6> to <2 x i16> 76 trunc <3 x i32> <i32 -6, i32 6, i32 0> to <3 x i16> 77 trunc <2 x i64> <i64 -6, i64 6> to <2 x i8> 78 trunc <3 x i64> <i64 -6, i64 6, i64 0> to <3 x i8> 79 trunc <2 x i64> <i64 -6, i64 6> to <2 x i16> 80 trunc <3 x i64> <i64 -6, i64 6, i64 0> to <3 x i16> 81 trunc <2 x i64> <i64 -6, i64 6> to <2 x i32> 82 trunc <3 x i64> <i64 -6, i64 6, i64 0> to <3 x i32> 83 84 85 fpext <2 x float> < float 0.000000e+00, float 1.0> to <2 x double> 86 fpext <3 x float> < float 0.000000e+00, float -1.0, float 1.0> to <3 x double> 87 88 fptosi <2 x double> < double 0.000000e+00, double 1.0> to <2 x i8> 89 fptosi <3 x double> < double 0.000000e+00, double 1.0, double -1.0> to <3 x i8> 90 fptosi <2 x double> < double 0.000000e+00, double 1.0> to <2 x i16> 91 fptosi <3 x double> < double 0.000000e+00, double 1.0, double -1.0> to <3 x i16> 92 fptosi <2 x double> < double 0.000000e+00, double 1.0> to <2 x i32> 93 fptosi <3 x double> < double 0.000000e+00, double 1.0, double -1.0> to <3 x i32> 94 fptosi <2 x double> < double 0.000000e+00, double 1.0> to <2 x i64> 95 fptosi <3 x double> < double 0.000000e+00, double 1.0, double -1.0> to <3 x i64> 96 97 fptoui <2 x double> < double 0.000000e+00, double 1.0> to <2 x i8> 98 fptoui <3 x double> < double 0.000000e+00, double 1.0, double -1.0> to <3 x i8> 99 fptoui <2 x double> < double 0.000000e+00, double 1.0> to <2 x i16> 100 fptoui <3 x double> < double 0.000000e+00, double 1.0, double -1.0> to <3 x i16> 101 fptoui <2 x double> < double 0.000000e+00, double 1.0> to <2 x i32> 102 fptoui <3 x double> < double 0.000000e+00, double 1.0, double -1.0> to <3 x i32> 103 fptoui <2 x double> < double 0.000000e+00, double 1.0> to <2 x i64> 104 fptoui <3 x double> < double 0.000000e+00, double 1.0, double -1.0> to <3 x i64> 105 106 fptrunc <2 x double> < double 0.000000e+00, double 1.0> to <2 x float> 107 fptrunc <3 x double> < double 0.000000e+00, double 1.0, double -1.0> to <3 x float> 108 109 bitcast <8 x i8> <i8 0, i8 -1, i8 2, i8 -3, i8 4, i8 -5, i8 6, i8 -7> to <4 x i16> 110 bitcast <8 x i8> <i8 0, i8 -1, i8 2, i8 -3, i8 4, i8 -5, i8 6, i8 -7> to <2 x i32> 111 bitcast <8 x i8> <i8 0, i8 -1, i8 2, i8 -3, i8 4, i8 -5, i8 6, i8 -7> to i64 112 bitcast <8 x i8> <i8 0, i8 -1, i8 2, i8 -3, i8 4, i8 -5, i8 6, i8 -7> to <2 x float> 113 bitcast <8 x i8> <i8 0, i8 -1, i8 2, i8 -3, i8 4, i8 -5, i8 6, i8 -7> to double 114 115 bitcast <4 x i16> <i16 0, i16 -1, i16 2, i16 -3> to <8 x i8> 116 bitcast <4 x i16> <i16 0, i16 -1, i16 2, i16 -3> to <2 x i32> 117 bitcast <4 x i16> <i16 0, i16 -1, i16 2, i16 -3> to i64 118 bitcast <4 x i16> <i16 0, i16 -1, i16 2, i16 -3> to <2 x float> 119 bitcast <4 x i16> <i16 0, i16 -1, i16 2, i16 -3> to double 120 121 bitcast <2 x i32> <i32 1, i32 -1> to <8 x i8> 122 bitcast <2 x i32> <i32 1, i32 -1> to <4 x i16> 123 bitcast <2 x i32> <i32 1, i32 -1> to i64 124 bitcast <2 x i32> <i32 1, i32 -1> to <2 x float> 125 bitcast <2 x i32> <i32 1, i32 -1> to double 126 127 bitcast i64 1 to <8 x i8> 128 bitcast i64 1 to <4 x i16> 129 bitcast i64 1 to <2 x i32> 130 bitcast i64 1 to <2 x float> 131 bitcast i64 1 to double 132 133 bitcast <2 x float> <float 1.0, float -1.0> to <8 x i8> 134 bitcast <2 x float> <float 1.0, float -1.0> to <4 x i16> 135 bitcast <2 x float> <float 1.0, float -1.0> to i64 136 bitcast <2 x float> <float 1.0, float -1.0> to <2 x i32> 137 bitcast <2 x float> <float 1.0, float -1.0> to double 138 139 bitcast double 1.0 to <8 x i8> 140 bitcast double 1.0 to <4 x i16> 141 bitcast double 1.0 to <2 x i32> 142 bitcast double 1.0 to <2 x float> 143 bitcast double 1.0 to i64 144 145 ret i32 0 146} 147