1// RUN: not llvm-mc -arch=amdgcn -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=SICI 2// RUN: not llvm-mc -arch=amdgcn -mcpu=SI -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=SICI 3// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=SICI 4// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=CIVI --check-prefix=VI 5 6// RUN: not llvm-mc -arch=amdgcn -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOSICI 7// RUN: not llvm-mc -arch=amdgcn -mcpu=SI -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOSICI 8// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOSICI 9// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s 2>&1 | FileCheck %s -check-prefix=NOVI 10 11//===----------------------------------------------------------------------===// 12// Generic Checks for floating-point instructions (These have modifiers). 13//===----------------------------------------------------------------------===// 14 15// TODO: 64-bit encoding of instructions with modifiers 16 17// _e32 suffix 18// SICI: v_add_f32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x06] 19v_add_f32_e32 v1, v2, v3 20 21// src0 inline immediate 22// SICI: v_add_f32_e32 v1, 1.0, v3 ; encoding: [0xf2,0x06,0x02,0x06] 23v_add_f32 v1, 1.0, v3 24 25// src0 negative inline immediate 26// SICI: v_add_f32_e32 v1, -1.0, v3 ; encoding: [0xf3,0x06,0x02,0x06] 27v_add_f32 v1, -1.0, v3 28 29// src0 literal 30// SICI: v_add_f32_e32 v1, 0x42c80000, v3 ; encoding: [0xff,0x06,0x02,0x06,0x00,0x00,0xc8,0x42] 31v_add_f32 v1, 100.0, v3 32 33// src0 negative literal 34// SICI: v_add_f32_e32 v1, 0xc2c80000, v3 ; encoding: [0xff,0x06,0x02,0x06,0x00,0x00,0xc8,0xc2] 35v_add_f32 v1, -100.0, v3 36 37//===----------------------------------------------------------------------===// 38// Generic Checks for integer instructions (These don't have modifiers). 39//===----------------------------------------------------------------------===// 40 41// _e32 suffix 42// SICI: v_mul_i32_i24_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x12] 43v_mul_i32_i24_e32 v1, v2, v3 44 45// _e64 suffix 46// SICI: v_mul_i32_i24_e64 v1, v2, v3 ; encoding: [0x01,0x00,0x12,0xd2,0x02,0x07,0x02,0x00] 47v_mul_i32_i24_e64 v1, v2, v3 48 49// src0 inline 50// SICI: v_mul_i32_i24_e32 v1, 3, v3 ; encoding: [0x83,0x06,0x02,0x12] 51v_mul_i32_i24 v1, 3, v3 52 53// src0 negative inline 54// SICI: v_mul_i32_i24_e32 v1, -3, v3 ; encoding: [0xc3,0x06,0x02,0x12] 55v_mul_i32_i24 v1, -3, v3 56 57// src1 inline 58// SICI: v_mul_i32_i24_e64 v1, v2, 3 ; encoding: [0x01,0x00,0x12,0xd2,0x02,0x07,0x01,0x00] 59v_mul_i32_i24 v1, v2, 3 60 61// src1 negative inline 62// SICI: v_mul_i32_i24_e64 v1, v2, -3 ; encoding: [0x01,0x00,0x12,0xd2,0x02,0x87,0x01,0x00] 63v_mul_i32_i24 v1, v2, -3 64 65// src0 literal 66// SICI: v_mul_i32_i24_e32 v1, 0x64, v3 ; encoding: [0xff,0x06,0x02,0x12,0x64,0x00,0x00,0x00] 67v_mul_i32_i24 v1, 100, v3 68 69// src1 negative literal 70// SICI: v_mul_i32_i24_e32 v1, 0xffffff9c, v3 ; encoding: [0xff,0x06,0x02,0x12,0x9c,0xff,0xff,0xff] 71v_mul_i32_i24 v1, -100, v3 72 73//===----------------------------------------------------------------------===// 74// Checks for legal operands 75//===----------------------------------------------------------------------===// 76 77// src0 sgpr 78// SICI: v_mul_i32_i24_e32 v1, s2, v3 ; encoding: [0x02,0x06,0x02,0x12] 79v_mul_i32_i24 v1, s2, v3 80 81// src1 sgpr 82// SICI: v_mul_i32_i24_e64 v1, v2, s3 ; encoding: [0x01,0x00,0x12,0xd2,0x02,0x07,0x00,0x00] 83v_mul_i32_i24 v1, v2, s3 84 85// src0, src1 same sgpr 86// SICI: v_mul_i32_i24_e64 v1, s2, s2 ; encoding: [0x01,0x00,0x12,0xd2,0x02,0x04,0x00,0x00] 87v_mul_i32_i24 v1, s2, s2 88 89// src0 sgpr, src1 inline 90// SICI: v_mul_i32_i24_e64 v1, s2, 3 ; encoding: [0x01,0x00,0x12,0xd2,0x02,0x06,0x01,0x00] 91v_mul_i32_i24 v1, s2, 3 92 93// src0 inline src1 sgpr 94// SICI: v_mul_i32_i24_e64 v1, 3, s3 ; encoding: [0x01,0x00,0x12,0xd2,0x83,0x06,0x00,0x00] 95v_mul_i32_i24 v1, 3, s3 96 97// SICI: v_add_i32_e32 v0, vcc, 0.5, v0 ; encoding: [0xf0,0x00,0x00,0x4a] 98// VI: v_add_i32_e32 v0, vcc, 0.5, v0 ; encoding: [0xf0,0x00,0x00,0x32] 99v_add_i32 v0, vcc, 0.5, v0 100 101// SICI: v_add_i32_e32 v0, vcc, 0x40480000, v0 ; encoding: [0xff,0x00,0x00,0x4a,0x00,0x00,0x48,0x40] 102// VI: v_add_i32_e32 v0, vcc, 0x40480000, v0 ; encoding: [0xff,0x00,0x00,0x32,0x00,0x00,0x48,0x40] 103v_add_i32 v0, vcc, 3.125, v0 104 105//===----------------------------------------------------------------------===// 106// Instructions 107//===----------------------------------------------------------------------===// 108 109// GCN: v_cndmask_b32_e32 v1, v2, v3, vcc ; encoding: [0x02,0x07,0x02,0x00] 110v_cndmask_b32 v1, v2, v3, vcc 111 112// GCN: v_cndmask_b32_e32 v1, v2, v3, vcc ; encoding: [0x02,0x07,0x02,0x00] 113v_cndmask_b32_e32 v1, v2, v3, vcc 114 115// SICI: v_readlane_b32 s1, v2, s3 ; encoding: [0x02,0x07,0x02,0x02] 116// VI: v_readlane_b32 s1, v2, s3 ; encoding: [0x01,0x00,0x89,0xd2,0x02,0x07,0x00,0x00] 117v_readlane_b32 s1, v2, s3 118 119// SICI: v_writelane_b32 v1, s2, s3 ; encoding: [0x02,0x06,0x02,0x04] 120// VI: v_writelane_b32 v1, s2, s3 ; encoding: [0x01,0x00,0x8a,0xd2,0x02,0x06,0x00,0x00] 121v_writelane_b32 v1, s2, s3 122 123// SICI: v_add_f32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x06] 124// VI: v_add_f32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x02] 125v_add_f32 v1, v2, v3 126 127// SICI: v_sub_f32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x08] 128// VI: v_sub_f32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x04] 129v_sub_f32 v1, v2, v3 130 131// SICI: v_subrev_f32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x0a] 132// VI: v_subrev_f32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x06] 133v_subrev_f32 v1, v2, v3 134 135// SICI: v_mac_legacy_f32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x0c] 136// NOVI: error: instruction not supported on this GPU 137// NOVI: v_mac_legacy_f32 v1, v2, v3 138v_mac_legacy_f32 v1, v2, v3 139 140// SICI: v_mul_legacy_f32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x0e] 141// VI: v_mul_legacy_f32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x08] 142v_mul_legacy_f32_e32 v1, v2, v3 143 144// SICI: v_mul_f32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x10] 145// VI: v_mul_f32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x0a] 146v_mul_f32 v1, v2, v3 147 148// SICI: v_mul_i32_i24_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x12] 149// VI: v_mul_i32_i24_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x0c] 150v_mul_i32_i24 v1, v2, v3 151 152// SICI: v_mul_hi_i32_i24_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x14] 153// VI: v_mul_hi_i32_i24_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x0e] 154v_mul_hi_i32_i24 v1, v2, v3 155 156// SICI: v_mul_u32_u24_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x16] 157// VI: v_mul_u32_u24_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x10] 158v_mul_u32_u24 v1, v2, v3 159 160// SICI: v_mul_hi_u32_u24_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x18] 161// VI: v_mul_hi_u32_u24_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x12] 162v_mul_hi_u32_u24 v1, v2, v3 163 164// SICI: v_min_legacy_f32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x1a] 165// NOVI: error: instruction not supported on this GPU 166// NOVI: v_min_legacy_f32_e32 v1, v2, v3 167v_min_legacy_f32_e32 v1, v2, v3 168 169// SICI: v_max_legacy_f32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x1c] 170// NOVI: error: instruction not supported on this GPU 171// NOVI: v_max_legacy_f32 v1, v2, v3 172v_max_legacy_f32 v1, v2, v3 173 174// SICI: v_min_f32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x1e] 175// VI: v_min_f32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x14] 176v_min_f32_e32 v1, v2, v3 177 178// SICI: v_max_f32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x20] 179// VI: v_max_f32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x16] 180v_max_f32 v1, v2 v3 181 182// SICI: v_min_i32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x22] 183// VI: v_min_i32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x18] 184v_min_i32 v1, v2, v3 185 186// SICI: v_max_i32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x24] 187// VI: v_max_i32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x1a] 188v_max_i32 v1, v2, v3 189 190// SICI: v_min_u32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x26] 191// VI: v_min_u32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x1c] 192v_min_u32 v1, v2, v3 193 194// SICI: v_max_u32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x28] 195// VI: v_max_u32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x1e] 196v_max_u32 v1, v2, v3 197 198// SICI: v_lshr_b32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x2a] 199// NOVI: error: instruction not supported on this GPU 200// NOVI: v_lshr_b32 v1, v2, v3 201v_lshr_b32 v1, v2, v3 202 203// SICI: v_lshrrev_b32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x2c] 204// VI: v_lshrrev_b32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x20] 205v_lshrrev_b32 v1, v2, v3 206 207// SICI: v_ashr_i32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x2e] 208// NOVI: error: instruction not supported on this GPU 209// NOVI: v_ashr_i32 v1, v2, v3 210v_ashr_i32 v1, v2, v3 211 212// SICI: v_ashrrev_i32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x30] 213// VI: v_ashrrev_i32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x22] 214v_ashrrev_i32 v1, v2, v3 215 216// SICI: v_lshl_b32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x32] 217// NOVI: error: instruction not supported on this GPU 218// NOVI: v_lshl_b32_e32 v1, v2, v3 219v_lshl_b32_e32 v1, v2, v3 220 221// SICI: v_lshlrev_b32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x34] 222// VI: v_lshlrev_b32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x24] 223v_lshlrev_b32 v1, v2, v3 224 225// SICI: v_and_b32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x36] 226// VI: v_and_b32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x26] 227v_and_b32 v1, v2, v3 228 229// SICI: v_or_b32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x38] 230// VI: v_or_b32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x28] 231v_or_b32 v1, v2, v3 232 233// SICI: v_xor_b32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x3a] 234// VI: v_xor_b32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x2a] 235v_xor_b32 v1, v2, v3 236 237// SICI: v_bfm_b32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x3c] 238// VI: v_bfm_b32_e64 v1, v2, v3 ; encoding: [0x01,0x00,0x93,0xd2,0x02,0x07,0x02,0x00] 239v_bfm_b32 v1, v2, v3 240 241// SICI: v_mac_f32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x3e] 242// VI: v_mac_f32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x2c] 243v_mac_f32 v1, v2, v3 244 245// SICI: v_madmk_f32_e32 v1, v2, 0x42800000, v3 ; encoding: [0x02,0x07,0x02,0x40,0x00,0x00,0x80,0x42] 246// VI: v_madmk_f32_e32 v1, v2, 0x42800000, v3 ; encoding: [0x02,0x07,0x02,0x2e,0x00,0x00,0x80,0x42] 247v_madmk_f32 v1, v2, 64.0, v3 248 249// SICI: v_madak_f32_e32 v1, v2, v3, 0x42800000 ; encoding: [0x02,0x07,0x02,0x42,0x00,0x00,0x80,0x42] 250// VI: v_madak_f32_e32 v1, v2, v3, 0x42800000 ; encoding: [0x02,0x07,0x02,0x30,0x00,0x00,0x80,0x42] 251v_madak_f32 v1, v2, v3, 64.0 252 253// SICI: v_bcnt_u32_b32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x44] 254// VI: v_bcnt_u32_b32_e64 v1, v2, v3 ; encoding: [0x01,0x00,0x8b,0xd2,0x02,0x07,0x02,0x00] 255v_bcnt_u32_b32 v1, v2, v3 256 257// SICI: v_mbcnt_lo_u32_b32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x46] 258// VI: v_mbcnt_lo_u32_b32_e64 v1, v2, v3 ; encoding: [0x01,0x00,0x8c,0xd2,0x02,0x07,0x02,0x00] 259v_mbcnt_lo_u32_b32 v1, v2, v3 260 261// SICI: v_mbcnt_hi_u32_b32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x48] 262// VI: v_mbcnt_hi_u32_b32_e64 v1, v2, v3 ; encoding: [0x01,0x00,0x8d,0xd2,0x02,0x07,0x02,0x00] 263v_mbcnt_hi_u32_b32 v1, v2, v3 264 265// SICI: v_add_i32_e32 v1, vcc, v2, v3 ; encoding: [0x02,0x07,0x02,0x4a] 266// VI: v_add_i32_e32 v1, vcc, v2, v3 ; encoding: [0x02,0x07,0x02,0x32] 267v_add_i32 v1, vcc, v2, v3 268 269// SICI: v_add_i32_e64 v1, s[0:1], v2, v3 ; encoding: [0x01,0x00,0x4a,0xd2,0x02,0x07,0x02,0x00] 270// VI: v_add_i32_e64 v1, s[0:1], v2, v3 ; encoding: [0x01,0x00,0x19,0xd1,0x02,0x07,0x02,0x00] 271v_add_i32 v1, s[0:1], v2, v3 272 273// SICI: v_add_i32_e64 v1, s[0:1], v2, v3 ; encoding: [0x01,0x00,0x4a,0xd2,0x02,0x07,0x02,0x00] 274// VI: v_add_i32_e64 v1, s[0:1], v2, v3 ; encoding: [0x01,0x00,0x19,0xd1,0x02,0x07,0x02,0x00] 275v_add_i32_e64 v1, s[0:1], v2, v3 276 277// SICI: v_add_i32_e64 v1, vcc, v2, v3 ; encoding: [0x01,0x6a,0x4a,0xd2,0x02,0x07,0x02,0x00] 278// VI: v_add_i32_e64 v1, vcc, v2, v3 ; encoding: [0x01,0x6a,0x19,0xd1,0x02,0x07,0x02,0x00] 279v_add_i32_e64 v1, vcc, v2, v3 280 281// SICI: v_add_i32_e32 v1, vcc, v2, v3 ; encoding: [0x02,0x07,0x02,0x4a] 282// VI: v_add_i32_e32 v1, vcc, v2, v3 ; encoding: [0x02,0x07,0x02,0x32] 283v_add_u32 v1, vcc, v2, v3 284 285// SICI: v_add_i32_e64 v1, s[0:1], v2, v3 ; encoding: [0x01,0x00,0x4a,0xd2,0x02,0x07,0x02,0x00] 286// VI: v_add_i32_e64 v1, s[0:1], v2, v3 ; encoding: [0x01,0x00,0x19,0xd1,0x02,0x07,0x02,0x00] 287v_add_u32 v1, s[0:1], v2, v3 288 289// SICI: v_sub_i32_e32 v1, vcc, v2, v3 ; encoding: [0x02,0x07,0x02,0x4c] 290// VI: v_sub_i32_e32 v1, vcc, v2, v3 ; encoding: [0x02,0x07,0x02,0x34] 291v_sub_i32 v1, vcc, v2, v3 292 293// SICI: v_sub_i32_e64 v1, s[0:1], v2, v3 ; encoding: [0x01,0x00,0x4c,0xd2,0x02,0x07,0x02,0x00] 294// VI: v_sub_i32_e64 v1, s[0:1], v2, v3 ; encoding: [0x01,0x00,0x1a,0xd1,0x02,0x07,0x02,0x00] 295v_sub_i32 v1, s[0:1], v2, v3 296 297// SICI: v_sub_i32_e32 v1, vcc, v2, v3 ; encoding: [0x02,0x07,0x02,0x4c] 298// VI: v_sub_i32_e32 v1, vcc, v2, v3 ; encoding: [0x02,0x07,0x02,0x34] 299v_sub_u32 v1, vcc, v2, v3 300 301// SICI: v_sub_i32_e64 v1, s[0:1], v2, v3 ; encoding: [0x01,0x00,0x4c,0xd2,0x02,0x07,0x02,0x00] 302// VI: v_sub_i32_e64 v1, s[0:1], v2, v3 ; encoding: [0x01,0x00,0x1a,0xd1,0x02,0x07,0x02,0x00] 303v_sub_u32 v1, s[0:1], v2, v3 304 305// SICI: v_subrev_i32_e32 v1, vcc, v2, v3 ; encoding: [0x02,0x07,0x02,0x4e] 306// VI: v_subrev_i32_e32 v1, vcc, v2, v3 ; encoding: [0x02,0x07,0x02,0x36] 307v_subrev_i32 v1, vcc, v2, v3 308 309// SICI: v_subrev_i32_e64 v1, s[0:1], v2, v3 ; encoding: [0x01,0x00,0x4e,0xd2,0x02,0x07,0x02,0x00] 310// VI: v_subrev_i32_e64 v1, s[0:1], v2, v3 ; encoding: [0x01,0x00,0x1b,0xd1,0x02,0x07,0x02,0x00] 311v_subrev_i32 v1, s[0:1], v2, v3 312 313// SICI: v_subrev_i32_e32 v1, vcc, v2, v3 ; encoding: [0x02,0x07,0x02,0x4e] 314// VI: v_subrev_i32_e32 v1, vcc, v2, v3 ; encoding: [0x02,0x07,0x02,0x36] 315v_subrev_u32 v1, vcc, v2, v3 316 317// SICI: v_subrev_i32_e64 v1, s[0:1], v2, v3 ; encoding: [0x01,0x00,0x4e,0xd2,0x02,0x07,0x02,0x00] 318// VI: v_subrev_i32_e64 v1, s[0:1], v2, v3 ; encoding: [0x01,0x00,0x1b,0xd1,0x02,0x07,0x02,0x00] 319v_subrev_u32 v1, s[0:1], v2, v3 320 321// SICI: v_addc_u32_e32 v1, vcc, v2, v3, vcc ; encoding: [0x02,0x07,0x02,0x50] 322// VI: v_addc_u32_e32 v1, vcc, v2, v3, vcc ; encoding: [0x02,0x07,0x02,0x38] 323v_addc_u32 v1, vcc, v2, v3, vcc 324 325// SICI: v_addc_u32_e32 v1, vcc, v2, v3, vcc ; encoding: [0x02,0x07,0x02,0x50] 326// VI: v_addc_u32_e32 v1, vcc, v2, v3, vcc ; encoding: [0x02,0x07,0x02,0x38] 327v_addc_u32_e32 v1, vcc, v2, v3, vcc 328 329 330// SI: v_addc_u32_e64 v1, s[0:1], v2, v3, vcc ; encoding: [0x01,0x00,0x50,0xd2,0x02,0x07,0xaa,0x01] 331// VI: v_addc_u32_e64 v1, s[0:1], v2, v3, vcc ; encoding: [0x01,0x00,0x1c,0xd1,0x02,0x07,0xaa,0x01] 332v_addc_u32 v1, s[0:1], v2, v3, vcc 333 334// SI: v_addc_u32_e64 v1, s[0:1], v2, v3, s[2:3] ; encoding: [0x01,0x00,0x50,0xd2,0x02,0x07,0x0a,0x00] 335// VI: v_addc_u32_e64 v1, s[0:1], v2, v3, s[2:3] ; encoding: [0x01,0x00,0x1c,0xd1,0x02,0x07,0x0a,0x00] 336v_addc_u32 v1, s[0:1], v2, v3, s[2:3] 337 338// SI: v_addc_u32_e64 v1, s[0:1], v2, v3, s[2:3] ; encoding: [0x01,0x00,0x50,0xd2,0x02,0x07,0x0a,0x00] 339// VI: v_addc_u32_e64 v1, s[0:1], v2, v3, s[2:3] ; encoding: [0x01,0x00,0x1c,0xd1,0x02,0x07,0x0a,0x00] 340v_addc_u32_e64 v1, s[0:1], v2, v3, s[2:3] 341 342// SI: v_addc_u32_e64 v1, s[0:1], v2, v3, -1 ; encoding: [0x01,0x00,0x50,0xd2,0x02,0x07,0x06,0x03] 343// VI: v_addc_u32_e64 v1, s[0:1], v2, v3, -1 ; encoding: [0x01,0x00,0x1c,0xd1,0x02,0x07,0x06,0x03] 344v_addc_u32_e64 v1, s[0:1], v2, v3, -1 345 346// SI: v_addc_u32_e64 v1, vcc, v2, v3, -1 ; encoding: [0x01,0x6a,0x50,0xd2,0x02,0x07,0x06,0x03] 347// VI: v_addc_u32_e64 v1, vcc, v2, v3, -1 ; encoding: [0x01,0x6a,0x1c,0xd1,0x02,0x07,0x06,0x03] 348v_addc_u32_e64 v1, vcc, v2, v3, -1 349 350// SI: v_addc_u32_e64 v1, vcc, v2, v3, vcc ; encoding: [0x01,0x6a,0x50,0xd2,0x02,0x07,0xaa,0x01] 351// VI: v_addc_u32_e64 v1, vcc, v2, v3, vcc ; encoding: [0x01,0x6a,0x1c,0xd1,0x02,0x07,0xaa,0x01] 352v_addc_u32_e64 v1, vcc, v2, v3, vcc 353 354// SI: v_subb_u32_e32 v1, vcc, v2, v3, vcc ; encoding: [0x02,0x07,0x02,0x52] 355// VI: v_subb_u32_e32 v1, vcc, v2, v3, vcc ; encoding: [0x02,0x07,0x02,0x3a] 356v_subb_u32 v1, vcc, v2, v3, vcc 357 358// SI: v_subb_u32_e64 v1, s[0:1], v2, v3, vcc ; encoding: [0x01,0x00,0x52,0xd2,0x02,0x07,0xaa,0x01] 359// VI: v_subb_u32_e64 v1, s[0:1], v2, v3, vcc ; encoding: [0x01,0x00,0x1d,0xd1,0x02,0x07,0xaa,0x01] 360v_subb_u32 v1, s[0:1], v2, v3, vcc 361 362// SICI: v_subbrev_u32_e32 v1, vcc, v2, v3, vcc ; encoding: [0x02,0x07,0x02,0x54] 363// VI: v_subbrev_u32_e32 v1, vcc, v2, v3, vcc ; encoding: [0x02,0x07,0x02,0x3c] 364v_subbrev_u32 v1, vcc, v2, v3, vcc 365 366// SICI: v_subbrev_u32_e64 v1, s[0:1], v2, v3, vcc ; encoding: [0x01,0x00,0x54,0xd2,0x02,0x07,0xaa,0x01] 367// VI: v_subbrev_u32_e64 v1, s[0:1], v2, v3, vcc ; encoding: [0x01,0x00,0x1e,0xd1,0x02,0x07,0xaa,0x01] 368v_subbrev_u32 v1, s[0:1], v2, v3, vcc 369 370// SICI: v_ldexp_f32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x56] 371// VI: v_ldexp_f32_e64 v1, v2, v3 ; encoding: [0x01,0x00,0x88,0xd2,0x02,0x07,0x02,0x00] 372v_ldexp_f32 v1, v2, v3 373 374// SICI: v_cvt_pkaccum_u8_f32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x58] 375// VI: v_cvt_pkaccum_u8_f32_e64 v1, v2, v3 ; encoding: [0x01,0x00,0xf0,0xd1,0x02,0x07,0x02,0x00] 376v_cvt_pkaccum_u8_f32 v1, v2, v3 377 378// SICI: v_cvt_pknorm_i16_f32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x5a] 379// VI: v_cvt_pknorm_i16_f32_e64 v1, v2, v3 ; encoding: [0x01,0x00,0x94,0xd2,0x02,0x07,0x02,0x00] 380v_cvt_pknorm_i16_f32 v1, v2, v3 381 382// SICI: v_cvt_pknorm_u16_f32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x5c] 383// VI: v_cvt_pknorm_u16_f32_e64 v1, v2, v3 ; encoding: [0x01,0x00,0x95,0xd2,0x02,0x07,0x02,0x00] 384v_cvt_pknorm_u16_f32 v1, v2, v3 385 386// SICI: v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x5e] 387// VI: v_cvt_pkrtz_f16_f32_e64 v1, v2, v3 ; encoding: [0x01,0x00,0x96,0xd2,0x02,0x07,0x02,0x00] 388v_cvt_pkrtz_f16_f32 v1, v2, v3 389 390// SICI: v_cvt_pk_u16_u32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x60] 391// VI: v_cvt_pk_u16_u32_e64 v1, v2, v3 ; encoding: [0x01,0x00,0x97,0xd2,0x02,0x07,0x02,0x00] 392v_cvt_pk_u16_u32 v1, v2, v3 393 394// SICI: v_cvt_pk_i16_i32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x62] 395// VI: v_cvt_pk_i16_i32_e64 v1, v2, v3 ; encoding: [0x01,0x00,0x98,0xd2,0x02,0x07,0x02,0x00] 396v_cvt_pk_i16_i32 v1, v2, v3 397 398// NOSICI: error: instruction not supported on this GPU 399// NOSICI: v_add_f16 v1, v2, v3 400// VI: v_add_f16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x3e] 401v_add_f16 v1, v2, v3 402 403// NOSICI: error: instruction not supported on this GPU 404// NOSICI: v_sub_f16 v1, v2, v3 405// VI: v_sub_f16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x40] 406v_sub_f16 v1, v2, v3 407 408// NOSICI: error: instruction not supported on this GPU 409// NOSICI: v_subrev_f16 v1, v2, v3 410// VI: v_subrev_f16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x42] 411v_subrev_f16 v1, v2, v3 412 413// NOSICI: error: instruction not supported on this GPU 414// NOSICI: v_mul_f16 v1, v2, v3 415// VI: v_mul_f16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x44] 416v_mul_f16 v1, v2, v3 417 418// NOSICI: error: instruction not supported on this GPU 419// NOSICI: v_mac_f16 v1, v2, v3 420// VI: v_mac_f16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x46] 421v_mac_f16 v1, v2, v3 422 423// NOSICI: error: instruction not supported on this GPU 424// NOSICI: v_madmk_f16 v1, v2, 64.0, v3 425// VI: v_madmk_f16_e32 v1, v2, 0x42800000, v3 ; encoding: [0x02,0x07,0x02,0x48,0x00,0x00,0x80,0x42] 426v_madmk_f16 v1, v2, 64.0, v3 427 428// NOSICI: error: instruction not supported on this GPU 429// NOSICI: v_madak_f16 v1, v2, v3, 64.0 430// VI: v_madak_f16_e32 v1, v2, v3, 0x42800000 ; encoding: [0x02,0x07,0x02,0x4a,0x00,0x00,0x80,0x42] 431v_madak_f16 v1, v2, v3, 64.0 432 433// NOSICI: error: instruction not supported on this GPU 434// NOSICI: v_add_u16 v1, v2, v3 435// VI: v_add_u16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x4c] 436v_add_u16 v1, v2, v3 437 438// NOSICI: error: instruction not supported on this GPU 439// NOSICI: v_sub_u16 v1, v2, v3 440// VI: v_sub_u16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x4e] 441v_sub_u16 v1, v2, v3 442 443// NOSICI: error: instruction not supported on this GPU 444// NOSICI: v_subrev_u16 v1, v2, v3 445// VI: v_subrev_u16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x50] 446v_subrev_u16 v1, v2, v3 447 448// NOSICI: error: instruction not supported on this GPU 449// NOSICI: v_mul_lo_u16 v1, v2, v3 450// VI: v_mul_lo_u16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x52] 451v_mul_lo_u16 v1, v2, v3 452 453// NOSICI: error: instruction not supported on this GPU 454// NOSICI: v_lshlrev_b16 v1, v2, v3 455// VI: v_lshlrev_b16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x54] 456v_lshlrev_b16 v1, v2, v3 457 458// NOSICI: error: instruction not supported on this GPU 459// NOSICI: v_lshrrev_b16 v1, v2, v3 460// VI: v_lshrrev_b16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x56] 461v_lshrrev_b16 v1, v2, v3 462 463// NOSICI: error: instruction not supported on this GPU 464// NOSICI: v_ashrrev_b16 v1, v2, v3 465// VI: v_ashrrev_b16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x58] 466v_ashrrev_b16 v1, v2, v3 467 468// NOSICI: error: instruction not supported on this GPU 469// NOSICI: v_max_f16 v1, v2, v3 470// VI: v_max_f16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x5a] 471v_max_f16 v1, v2, v3 472 473// NOSICI: error: instruction not supported on this GPU 474// NOSICI: v_min_f16 v1, v2, v3 475// VI: v_min_f16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x5c] 476v_min_f16 v1, v2, v3 477 478// NOSICI: error: instruction not supported on this GPU 479// NOSICI: v_max_u16 v1, v2, v3 480// VI: v_max_u16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x5e] 481v_max_u16 v1, v2, v3 482 483// NOSICI: error: instruction not supported on this GPU 484// NOSICI: v_max_i16 v1, v2, v3 485// VI: v_max_i16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x60] 486v_max_i16 v1, v2, v3 487 488// NOSICI: error: instruction not supported on this GPU 489// NOSICI: v_min_u16 v1, v2, v3 490// VI: v_min_u16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x62] 491v_min_u16 v1, v2, v3 492 493// NOSICI: error: instruction not supported on this GPU 494// NOSICI: v_min_i16 v1, v2, v3 495// VI: v_min_i16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x64] 496v_min_i16 v1, v2, v3 497 498// NOSICI: error: instruction not supported on this GPU 499// NOSICI: v_ldexp_f16 v1, v2, v3 500// VI: v_ldexp_f16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x66] 501v_ldexp_f16 v1, v2, v3 502