1RUN: llvm-readobj -mips-abi-flags %p/Inputs/abiflags.obj.elf-mipsel | \ 2RUN: FileCheck -check-prefix=EL64 %s 3RUN: llvm-readobj -mips-abi-flags %p/Inputs/abiflags.obj.elf-mips | \ 4RUN: FileCheck -check-prefix=BE32 %s 5 6EL64: MIPS ABI Flags { 7EL64-NEXT: Version: 0 8EL64-NEXT: ISA: MIPS64r5 9EL64-NEXT: ISA Extension: Cavium Networks Octeon3 (0x13) 10EL64-NEXT: ASEs [ (0x103) 11EL64-NEXT: DSP (0x1) 12EL64-NEXT: DSPR2 (0x2) 13EL64-NEXT: VZ (0x100) 14EL64-NEXT: ] 15EL64-NEXT: FP ABI: Hard float (double precision) (0x1) 16EL64-NEXT: GPR size: 64 17EL64-NEXT: CPR1 size: 64 18EL64-NEXT: CPR2 size: 0 19EL64-NEXT: Flags 1 [ (0x1) 20EL64-NEXT: ODDSPREG (0x1) 21EL64-NEXT: ] 22EL64-NEXT: Flags 2: 0x0 23EL64-NEXT: } 24 25BE32: MIPS ABI Flags { 26BE32-NEXT: Version: 0 27BE32-NEXT: ISA: MIPS32r2 28BE32-NEXT: ISA Extension: None (0x0) 29BE32-NEXT: ASEs [ (0x803) 30BE32-NEXT: DSP (0x1) 31BE32-NEXT: DSPR2 (0x2) 32BE32-NEXT: microMIPS (0x800) 33BE32-NEXT: ] 34BE32-NEXT: FP ABI: Soft float (0x3) 35BE32-NEXT: GPR size: 32 36BE32-NEXT: CPR1 size: 0 37BE32-NEXT: CPR2 size: 0 38BE32-NEXT: Flags 1 [ (0x1) 39BE32-NEXT: ODDSPREG (0x1) 40BE32-NEXT: ] 41BE32-NEXT: Flags 2: 0x0 42BE32-NEXT: } 43