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1; RUN: llvm-as %s -o %t.bc
2; RUN: llvm-spirv %t.bc -spirv-text -o %t.spt
3; RUN: FileCheck < %t.spt %s --check-prefix=CHECK-SPIRV
4; RUN: llvm-spirv %t.bc -o %t.spv
5; RUN: llvm-spirv -r %t.spv -o %t.bc
6; RUN: llvm-dis < %t.bc | FileCheck %s --check-prefix=CHECK-LLVM
7
8; CHECK-SPIRV-NOT: 6 Store {{[0-9]+}} {{[0-9]+}} 1 2 8
9; CHECK-SPIRV: 5 Store {{[0-9]+}} {{[0-9]+}} 3 8
10; CHECK-SPIRV-NOT: 7 Load {{[0-9]+}} {{[0-9]+}} {{[0-9]+}} 1 2 8
11; CHECK-SPIRV: 6 Load {{[0-9]+}} {{[0-9]+}} {{[0-9]+}} 3 8
12; CHECK-SPIRV: 6 Load {{[0-9]+}} {{[0-9]+}} {{[0-9]+}} 2 4
13; CHECK-SPIRV-NOT: 7 Load {{[0-9]+}} {{[0-9]+}} {{[0-9]+}} 1 2 8
14; CHECK-SPIRV: 6 Load {{[0-9]+}} {{[0-9]+}} {{[0-9]+}} 3 8
15; CHECK-SPIRV-NOT: 7 Load {{[0-9]+}} {{[0-9]+}} {{[0-9]+}} 1 2 0
16; CHECK-SPIRV: 5 Load {{[0-9]+}} {{[0-9]+}} {{[0-9]+}} 1
17; CHECK-SPIRV-NOT: 7 Load {{[0-9]+}} {{[0-9]+}} {{[0-9]+}} 1 2 8
18; CHECK-SPIRV: 6 Load {{[0-9]+}} {{[0-9]+}} {{[0-9]+}} 7 8
19; CHECK-SPIRV-NOT: 5 Store {{[0-9]+}} {{[0-9]+}} 2 4
20; CHECK-SPIRV: 5 Store {{[0-9]+}} {{[0-9]+}} 6 4
21; CHECK-SPIRV-NOT: 5 Store {{[0-9]+}} {{[0-9]+}} 2 0
22; CHECK-SPIRV: 3 Store {{[0-9]+}} {{[0-9]+}}
23
24; CHECK-LLVM: store volatile i32 addrspace(4)* %0, i32 addrspace(4)** %ptr, align 8
25; CHECK-LLVM: load volatile i32 addrspace(4)*, i32 addrspace(4)** %ptr, align 8
26; CHECK-LLVM: load i32, i32 addrspace(4)* %1, align 4
27; CHECK-LLVM: load volatile i32 addrspace(4)*, i32 addrspace(4)** %ptr, align 8
28; CHECK-LLVM: load volatile i32 addrspace(4)*, i32 addrspace(4)** %ptr
29; CHECK-LLVM: load volatile i32 addrspace(4)*, i32 addrspace(4)** %ptr, align 8, !nontemporal ![[NTMetadata:[0-9]+]]
30; CHECK-LLVM: store i32 %call.old, i32 addrspace(4)* %arrayidx, align 4, !nontemporal ![[NTMetadata:[0-9]+]]
31; CHECK-LLVM: store i32 addrspace(4)* %5, i32 addrspace(4)** %ptr
32; CHECK-LLVM: ![[NTMetadata:[0-9]+]] = !{i32 1}
33
34; ModuleID = 'test.bc'
35target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
36target triple = "spir64-unknown-unknown"
37
38; Function Attrs: nounwind
39define spir_kernel void @test_load_store(i32 addrspace(1)* %destMemory, i32 addrspace(1)* %oldValues, i32 %newValue) #0 {
40entry:
41  %ptr = alloca i32 addrspace(4)*, align 8
42  %0 = addrspacecast i32 addrspace(1)* %oldValues to i32 addrspace(4)*
43  store volatile i32 addrspace(4)* %0, i32 addrspace(4)** %ptr, align 8
44  %1 = load volatile i32 addrspace(4)*, i32 addrspace(4)** %ptr, align 8
45  %2 = load i32, i32 addrspace(4)* %1, align 4
46  %call = call spir_func i32 @_Z14atomic_cmpxchgPVU3AS1iii(i32 addrspace(1)* %destMemory, i32 %2, i32 %newValue)
47  %3 = load volatile i32 addrspace(4)*, i32 addrspace(4)** %ptr, align 8
48  %4 = load volatile i32 addrspace(4)*, i32 addrspace(4)** %ptr
49  %5 = load volatile i32 addrspace(4)*, i32 addrspace(4)** %ptr, align 8, !nontemporal !9
50  %arrayidx = getelementptr inbounds i32, i32 addrspace(4)* %3, i64 0
51  store i32 %call, i32 addrspace(4)* %arrayidx, align 4, !nontemporal !9
52  store i32 addrspace(4)* %5, i32 addrspace(4)** %ptr
53  ret void
54}
55
56declare spir_func i32 @_Z14atomic_cmpxchgPVU3AS1iii(i32 addrspace(1)*, i32, i32) #1
57
58attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
59attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
60
61!opencl.kernels = !{!0}
62!opencl.enable.FP_CONTRACT = !{}
63!opencl.spir.version = !{!6}
64!opencl.ocl.version = !{!7}
65!opencl.used.extensions = !{!8}
66!opencl.used.optional.core.features = !{!8}
67!opencl.compiler.options = !{!8}
68!llvm.ident = !{!10}
69
70!0 = !{void (i32 addrspace(1)*, i32 addrspace(1)*, i32)* @test_load_store, !1, !2, !3, !4, !5}
71!1 = !{!"kernel_arg_addr_space", i32 1, i32 1, i32 0}
72!2 = !{!"kernel_arg_access_qual", !"none", !"none", !"none"}
73!3 = !{!"kernel_arg_type", !"int*", !"int*", !"int"}
74!4 = !{!"kernel_arg_base_type", !"int*", !"int*", !"int"}
75!5 = !{!"kernel_arg_type_qual", !"volatile", !"", !""}
76!6 = !{i32 1, i32 2}
77!7 = !{i32 2, i32 0}
78!8 = !{}
79!9 = !{i32 1}
80!10 = !{!"clang version 3.6.1"}
81