1; RUN: llc < %s -mtriple=arm-apple-darwin -mcpu=cortex-a9 | FileCheck %s 2; rdar://8402126 3; Make sure if-converter is not predicating vldmia and ldmia. These are 4; micro-coded and would have long issue latency even if predicated on 5; false predicate. 6 7define void @t(double %a, double %b, double %c, double %d, i32* nocapture %solutions, double* nocapture %x) nounwind { 8entry: 9; CHECK: t: 10; CHECK: vpop {d8} 11; CHECK-NOT: vpopne 12; CHECK: pop {r7, pc} 13; CHECK: vpop {d8} 14; CHECK: pop {r7, pc} 15 br i1 undef, label %if.else, label %if.then 16 17if.then: ; preds = %entry 18 %mul73 = fmul double undef, 0.000000e+00 19 %sub76 = fsub double %mul73, undef 20 store double %sub76, double* undef, align 4 21 %call88 = tail call double @cos(double 0.000000e+00) nounwind 22 %mul89 = fmul double undef, %call88 23 %sub92 = fsub double %mul89, undef 24 store double %sub92, double* undef, align 4 25 ret void 26 27if.else: ; preds = %entry 28 %tmp101 = tail call double @llvm.pow.f64(double undef, double 0x3FD5555555555555) 29 %add112 = fadd double %tmp101, undef 30 %mul118 = fmul double %add112, undef 31 store double 0.000000e+00, double* %x, align 4 32 ret void 33} 34 35declare double @acos(double) 36 37declare double @sqrt(double) readnone 38 39declare double @cos(double) readnone 40 41declare double @fabs(double) 42 43declare double @llvm.pow.f64(double, double) nounwind readonly 44