1; RUN: llc < %s -mtriple=armv7-apple-darwin | FileCheck %s 2; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s 3 4%0 = type { i32, i32 } 5 6; CHECK: f0: 7; CHECK: ldrexd 8define i64 @f0(i8* %p) nounwind readonly { 9entry: 10 %ldrexd = tail call %0 @llvm.arm.ldrexd(i8* %p) 11 %0 = extractvalue %0 %ldrexd, 1 12 %1 = extractvalue %0 %ldrexd, 0 13 %2 = zext i32 %0 to i64 14 %3 = zext i32 %1 to i64 15 %shl = shl nuw i64 %2, 32 16 %4 = or i64 %shl, %3 17 ret i64 %4 18} 19 20; CHECK: f1: 21; CHECK: strexd 22define i32 @f1(i8* %ptr, i64 %val) nounwind { 23entry: 24 %tmp4 = trunc i64 %val to i32 25 %tmp6 = lshr i64 %val, 32 26 %tmp7 = trunc i64 %tmp6 to i32 27 %strexd = tail call i32 @llvm.arm.strexd(i32 %tmp4, i32 %tmp7, i8* %ptr) 28 ret i32 %strexd 29} 30 31declare %0 @llvm.arm.ldrexd(i8*) nounwind readonly 32declare i32 @llvm.arm.strexd(i32, i32, i8*) nounwind 33 34