1; RUN: llc < %s -march=arm -mattr=+neon | grep vldmia | count 4 2; RUN: llc < %s -march=arm -mattr=+neon | grep vstmia | count 1 3; RUN: llc < %s -march=arm -mattr=+neon | grep vmov | count 2 4 5define void @t1(<4 x i32>* %r, <2 x i64>* %a, <2 x i64>* %b) nounwind { 6entry: 7 %0 = load <2 x i64>* %a, align 16 ; <<2 x i64>> [#uses=1] 8 %1 = load <2 x i64>* %b, align 16 ; <<2 x i64>> [#uses=1] 9 %2 = add <2 x i64> %0, %1 ; <<2 x i64>> [#uses=1] 10 %3 = bitcast <2 x i64> %2 to <4 x i32> ; <<4 x i32>> [#uses=1] 11 store <4 x i32> %3, <4 x i32>* %r, align 16 12 ret void 13} 14 15define <4 x i32> @t2(<2 x i64>* %a, <2 x i64>* %b) nounwind readonly { 16entry: 17 %0 = load <2 x i64>* %a, align 16 ; <<2 x i64>> [#uses=1] 18 %1 = load <2 x i64>* %b, align 16 ; <<2 x i64>> [#uses=1] 19 %2 = sub <2 x i64> %0, %1 ; <<2 x i64>> [#uses=1] 20 %3 = bitcast <2 x i64> %2 to <4 x i32> ; <<4 x i32>> [#uses=1] 21 ret <4 x i32> %3 22} 23 24