1; RUN: llc < %s -march=arm | FileCheck %s --check-prefix=ARM 2; RUN: llc < %s -march=arm -mattr=+thumb2 | FileCheck %s --check-prefix=ARMT2 3; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s --check-prefix=THUMB2 4 5define i32 @t1(i32 %c) nounwind readnone { 6entry: 7; ARM: t1: 8; ARM: mov [[R1:r[0-9]+]], #101 9; ARM: orr [[R1b:r[0-9]+]], [[R1]], #256 10; ARM: movgt r0, #123 11 12; ARMT2: t1: 13; ARMT2: movw r0, #357 14; ARMT2: movgt r0, #123 15 16; THUMB2: t1: 17; THUMB2: movw r0, #357 18; THUMB2: movgt r0, #123 19 20 %0 = icmp sgt i32 %c, 1 21 %1 = select i1 %0, i32 123, i32 357 22 ret i32 %1 23} 24 25define i32 @t2(i32 %c) nounwind readnone { 26entry: 27; ARM: t2: 28; ARM: mov r0, #123 29; ARM: movgt r0, #101 30; ARM: orrgt r0, r0, #256 31 32; ARMT2: t2: 33; ARMT2: mov r0, #123 34; ARMT2: movwgt r0, #357 35 36; THUMB2: t2: 37; THUMB2: mov{{(s|\.w)}} r0, #123 38; THUMB2: movwgt r0, #357 39 40 %0 = icmp sgt i32 %c, 1 41 %1 = select i1 %0, i32 357, i32 123 42 ret i32 %1 43} 44 45define i32 @t3(i32 %a) nounwind readnone { 46entry: 47; ARM: t3: 48; ARM: mov r0, #0 49; ARM: moveq r0, #1 50 51; ARMT2: t3: 52; ARMT2: mov r0, #0 53; ARMT2: moveq r0, #1 54 55; THUMB2: t3: 56; THUMB2: mov{{(s|\.w)}} r0, #0 57; THUMB2: moveq r0, #1 58 %0 = icmp eq i32 %a, 160 59 %1 = zext i1 %0 to i32 60 ret i32 %1 61} 62 63define i32 @t4(i32 %a, i32 %b, i32 %x) nounwind { 64entry: 65; ARM: t4: 66; ARM: ldr 67; ARM: movlt 68 69; ARMT2: t4: 70; ARMT2: movwlt [[R0:r[0-9]+]], #65365 71; ARMT2: movtlt [[R0]], #65365 72 73; THUMB2: t4: 74; THUMB2: mvnlt.w [[R0:r[0-9]+]], #11141290 75 %0 = icmp slt i32 %a, %b 76 %1 = select i1 %0, i32 4283826005, i32 %x 77 ret i32 %1 78} 79 80; rdar://9758317 81define i32 @t5(i32 %a) nounwind { 82entry: 83; ARM: t5: 84; ARM-NOT: mov 85; ARM: cmp r0, #1 86; ARM-NOT: mov 87; ARM: movne r0, #0 88 89; THUMB2: t5: 90; THUMB2-NOT: mov 91; THUMB2: cmp r0, #1 92; THUMB2: it ne 93; THUMB2: movne r0, #0 94 %cmp = icmp eq i32 %a, 1 95 %conv = zext i1 %cmp to i32 96 ret i32 %conv 97} 98 99define i32 @t6(i32 %a) nounwind { 100entry: 101; ARM: t6: 102; ARM-NOT: mov 103; ARM: cmp r0, #0 104; ARM: movne r0, #1 105 106; THUMB2: t6: 107; THUMB2-NOT: mov 108; THUMB2: cmp r0, #0 109; THUMB2: it ne 110; THUMB2: movne r0, #1 111 %tobool = icmp ne i32 %a, 0 112 %lnot.ext = zext i1 %tobool to i32 113 ret i32 %lnot.ext 114} 115