1; RUN: llc < %s -march=bfin | FileCheck %s 2 3; Standard "r" 4; CHECK: r0 = r0 + r1; 5define i32 @add_r(i32 %A, i32 %B) { 6 %R = call i32 asm "$0 = $1 + $2;", "=r,r,r"( i32 %A, i32 %B ) nounwind 7 ret i32 %R 8} 9 10; Target "d" 11; CHECK: r0 = r0 - r1; 12define i32 @add_d(i32 %A, i32 %B) { 13 %R = call i32 asm "$0 = $1 - $2;", "=d,d,d"( i32 %A, i32 %B ) nounwind 14 ret i32 %R 15} 16 17; Target "a" for P-regs 18; CHECK: p0 = (p0 + p1) << 1; 19define i32 @add_a(i32 %A, i32 %B) { 20 %R = call i32 asm "$0 = ($1 + $2) << 1;", "=a,a,a"( i32 %A, i32 %B ) nounwind 21 ret i32 %R 22} 23 24; Target "z" for P0, P1, P2. This is not a real regclass 25; CHECK: p0 = (p0 + p1) << 2; 26define i32 @add_Z(i32 %A, i32 %B) { 27 %R = call i32 asm "$0 = ($1 + $2) << 2;", "=z,z,z"( i32 %A, i32 %B ) nounwind 28 ret i32 %R 29} 30 31; Target "C" for CC. This is a single register 32; CHECK: cc = p0 < p1; 33; CHECK: r0 = cc; 34define i32 @add_C(i32 %A, i32 %B) { 35 %R = call i32 asm "$0 = $1 < $2;", "=C,z,z"( i32 %A, i32 %B ) nounwind 36 ret i32 %R 37} 38 39