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1; RUN: llc < %s -mtriple=x86_64-apple-darwin -asm-verbose=false | FileCheck %s -check-prefix=64BIT
2; rdar://7329206
3
4; In 32-bit the partial register stall would degrade performance.
5
6define zeroext i16 @t1(i16 zeroext %c, i16 zeroext %k) nounwind ssp {
7entry:
8; 32BIT:     t1:
9; 32BIT:     movw 20(%esp), %ax
10; 32BIT-NOT: movw %ax, %cx
11; 32BIT:     leal 1(%eax), %ecx
12
13; 64BIT:     t1:
14; 64BIT-NOT: movw %si, %ax
15; 64BIT:     leal 1(%rsi), %eax
16  %0 = icmp eq i16 %k, %c                         ; <i1> [#uses=1]
17  %1 = add i16 %k, 1                              ; <i16> [#uses=3]
18  br i1 %0, label %bb, label %bb1
19
20bb:                                               ; preds = %entry
21  tail call void @foo(i16 zeroext %1) nounwind
22  ret i16 %1
23
24bb1:                                              ; preds = %entry
25  ret i16 %1
26}
27
28define zeroext i16 @t2(i16 zeroext %c, i16 zeroext %k) nounwind ssp {
29entry:
30; 32BIT:     t2:
31; 32BIT:     movw 20(%esp), %ax
32; 32BIT-NOT: movw %ax, %cx
33; 32BIT:     leal -1(%eax), %ecx
34
35; 64BIT:     t2:
36; 64BIT-NOT: movw %si, %ax
37; 64BIT:     leal -1(%rsi), %eax
38  %0 = icmp eq i16 %k, %c                         ; <i1> [#uses=1]
39  %1 = add i16 %k, -1                             ; <i16> [#uses=3]
40  br i1 %0, label %bb, label %bb1
41
42bb:                                               ; preds = %entry
43  tail call void @foo(i16 zeroext %1) nounwind
44  ret i16 %1
45
46bb1:                                              ; preds = %entry
47  ret i16 %1
48}
49
50declare void @foo(i16 zeroext)
51
52define zeroext i16 @t3(i16 zeroext %c, i16 zeroext %k) nounwind ssp {
53entry:
54; 32BIT:     t3:
55; 32BIT:     movw 20(%esp), %ax
56; 32BIT-NOT: movw %ax, %cx
57; 32BIT:     leal 2(%eax), %ecx
58
59; 64BIT:     t3:
60; 64BIT-NOT: movw %si, %ax
61; 64BIT:     leal 2(%rsi), %eax
62  %0 = add i16 %k, 2                              ; <i16> [#uses=3]
63  %1 = icmp eq i16 %k, %c                         ; <i1> [#uses=1]
64  br i1 %1, label %bb, label %bb1
65
66bb:                                               ; preds = %entry
67  tail call void @foo(i16 zeroext %0) nounwind
68  ret i16 %0
69
70bb1:                                              ; preds = %entry
71  ret i16 %0
72}
73
74define zeroext i16 @t4(i16 zeroext %c, i16 zeroext %k) nounwind ssp {
75entry:
76; 32BIT:     t4:
77; 32BIT:     movw 16(%esp), %ax
78; 32BIT:     movw 20(%esp), %cx
79; 32BIT-NOT: movw %cx, %dx
80; 32BIT:     leal (%ecx,%eax), %edx
81
82; 64BIT:     t4:
83; 64BIT-NOT: movw %si, %ax
84; 64BIT:     leal (%rsi,%rdi), %eax
85  %0 = add i16 %k, %c                             ; <i16> [#uses=3]
86  %1 = icmp eq i16 %k, %c                         ; <i1> [#uses=1]
87  br i1 %1, label %bb, label %bb1
88
89bb:                                               ; preds = %entry
90  tail call void @foo(i16 zeroext %0) nounwind
91  ret i16 %0
92
93bb1:                                              ; preds = %entry
94  ret i16 %0
95}
96