1; Tests to make sure elimination of casts is working correctly 2; RUN: opt < %s -instcombine -S | FileCheck %s 3target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128-n8:16:32:64" 4 5@inbuf = external global [32832 x i8] ; <[32832 x i8]*> [#uses=1] 6 7define i32 @test1(i32 %A) { 8 %c1 = bitcast i32 %A to i32 ; <i32> [#uses=1] 9 %c2 = bitcast i32 %c1 to i32 ; <i32> [#uses=1] 10 ret i32 %c2 11; CHECK: ret i32 %A 12} 13 14define i64 @test2(i8 %A) { 15 %c1 = zext i8 %A to i16 ; <i16> [#uses=1] 16 %c2 = zext i16 %c1 to i32 ; <i32> [#uses=1] 17 %Ret = zext i32 %c2 to i64 ; <i64> [#uses=1] 18 ret i64 %Ret 19; CHECK: %Ret = zext i8 %A to i64 20; CHECK: ret i64 %Ret 21} 22 23; This function should just use bitwise AND 24define i64 @test3(i64 %A) { 25 %c1 = trunc i64 %A to i8 ; <i8> [#uses=1] 26 %c2 = zext i8 %c1 to i64 ; <i64> [#uses=1] 27 ret i64 %c2 28; CHECK: %c2 = and i64 %A, 255 29; CHECK: ret i64 %c2 30} 31 32define i32 @test4(i32 %A, i32 %B) { 33 %COND = icmp slt i32 %A, %B ; <i1> [#uses=1] 34 ; Booleans are unsigned integrals 35 %c = zext i1 %COND to i8 ; <i8> [#uses=1] 36 ; for the cast elim purpose 37 %result = zext i8 %c to i32 ; <i32> [#uses=1] 38 ret i32 %result 39; CHECK: %COND = icmp slt i32 %A, %B 40; CHECK: %result = zext i1 %COND to i32 41; CHECK: ret i32 %result 42} 43 44define i32 @test5(i1 %B) { 45 ; This cast should get folded into 46 %c = zext i1 %B to i8 ; <i8> [#uses=1] 47 ; this cast 48 %result = zext i8 %c to i32 ; <i32> [#uses=1] 49 ret i32 %result 50; CHECK: %result = zext i1 %B to i32 51; CHECK: ret i32 %result 52} 53 54define i32 @test6(i64 %A) { 55 %c1 = trunc i64 %A to i32 ; <i32> [#uses=1] 56 %res = bitcast i32 %c1 to i32 ; <i32> [#uses=1] 57 ret i32 %res 58; CHECK: trunc i64 %A to i32 59; CHECK-NEXT: ret i32 60} 61 62define i64 @test7(i1 %A) { 63 %c1 = zext i1 %A to i32 ; <i32> [#uses=1] 64 %res = sext i32 %c1 to i64 ; <i64> [#uses=1] 65 ret i64 %res 66; CHECK: %res = zext i1 %A to i64 67; CHECK: ret i64 %res 68} 69 70define i64 @test8(i8 %A) { 71 %c1 = sext i8 %A to i64 ; <i64> [#uses=1] 72 %res = bitcast i64 %c1 to i64 ; <i64> [#uses=1] 73 ret i64 %res 74; CHECK: = sext i8 %A to i64 75; CHECK-NEXT: ret i64 76} 77 78define i16 @test9(i16 %A) { 79 %c1 = sext i16 %A to i32 ; <i32> [#uses=1] 80 %c2 = trunc i32 %c1 to i16 ; <i16> [#uses=1] 81 ret i16 %c2 82; CHECK: ret i16 %A 83} 84 85define i16 @test10(i16 %A) { 86 %c1 = sext i16 %A to i32 ; <i32> [#uses=1] 87 %c2 = trunc i32 %c1 to i16 ; <i16> [#uses=1] 88 ret i16 %c2 89; CHECK: ret i16 %A 90} 91 92declare void @varargs(i32, ...) 93 94define void @test11(i32* %P) { 95 %c = bitcast i32* %P to i16* ; <i16*> [#uses=1] 96 call void (i32, ...)* @varargs( i32 5, i16* %c ) 97 ret void 98; CHECK: call void (i32, ...)* @varargs(i32 5, i32* %P) 99; CHECK: ret void 100} 101 102define i8* @test13(i64 %A) { 103 %c = getelementptr [0 x i8]* bitcast ([32832 x i8]* @inbuf to [0 x i8]*), i64 0, i64 %A ; <i8*> [#uses=1] 104 ret i8* %c 105; CHECK: %c = getelementptr [32832 x i8]* @inbuf, i64 0, i64 %A 106; CHECK: ret i8* %c 107} 108 109define i1 @test14(i8 %A) { 110 %c = bitcast i8 %A to i8 ; <i8> [#uses=1] 111 %X = icmp ult i8 %c, -128 ; <i1> [#uses=1] 112 ret i1 %X 113; CHECK: %X = icmp sgt i8 %A, -1 114; CHECK: ret i1 %X 115} 116 117 118; This just won't occur when there's no difference between ubyte and sbyte 119;bool %test15(ubyte %A) { 120; %c = cast ubyte %A to sbyte 121; %X = setlt sbyte %c, 0 ; setgt %A, 127 122; ret bool %X 123;} 124 125define i1 @test16(i32* %P) { 126 %c = icmp ne i32* %P, null ; <i1> [#uses=1] 127 ret i1 %c 128; CHECK: %c = icmp ne i32* %P, null 129; CHECK: ret i1 %c 130} 131 132define i16 @test17(i1 %tmp3) { 133 %c = zext i1 %tmp3 to i32 ; <i32> [#uses=1] 134 %t86 = trunc i32 %c to i16 ; <i16> [#uses=1] 135 ret i16 %t86 136; CHECK: %t86 = zext i1 %tmp3 to i16 137; CHECK: ret i16 %t86 138} 139 140define i16 @test18(i8 %tmp3) { 141 %c = sext i8 %tmp3 to i32 ; <i32> [#uses=1] 142 %t86 = trunc i32 %c to i16 ; <i16> [#uses=1] 143 ret i16 %t86 144; CHECK: %t86 = sext i8 %tmp3 to i16 145; CHECK: ret i16 %t86 146} 147 148define i1 @test19(i32 %X) { 149 %c = sext i32 %X to i64 ; <i64> [#uses=1] 150 %Z = icmp slt i64 %c, 12345 ; <i1> [#uses=1] 151 ret i1 %Z 152; CHECK: %Z = icmp slt i32 %X, 12345 153; CHECK: ret i1 %Z 154} 155 156define i1 @test20(i1 %B) { 157 %c = zext i1 %B to i32 ; <i32> [#uses=1] 158 %D = icmp slt i32 %c, -1 ; <i1> [#uses=1] 159 ;; false 160 ret i1 %D 161; CHECK: ret i1 false 162} 163 164define i32 @test21(i32 %X) { 165 %c1 = trunc i32 %X to i8 ; <i8> [#uses=1] 166 ;; sext -> zext -> and -> nop 167 %c2 = sext i8 %c1 to i32 ; <i32> [#uses=1] 168 %RV = and i32 %c2, 255 ; <i32> [#uses=1] 169 ret i32 %RV 170; CHECK: %c21 = and i32 %X, 255 171; CHECK: ret i32 %c21 172} 173 174define i32 @test22(i32 %X) { 175 %c1 = trunc i32 %X to i8 ; <i8> [#uses=1] 176 ;; sext -> zext -> and -> nop 177 %c2 = sext i8 %c1 to i32 ; <i32> [#uses=1] 178 %RV = shl i32 %c2, 24 ; <i32> [#uses=1] 179 ret i32 %RV 180; CHECK: shl i32 %X, 24 181; CHECK-NEXT: ret i32 182} 183 184define i32 @test23(i32 %X) { 185 ;; Turn into an AND even though X 186 %c1 = trunc i32 %X to i16 ; <i16> [#uses=1] 187 ;; and Z are signed. 188 %c2 = zext i16 %c1 to i32 ; <i32> [#uses=1] 189 ret i32 %c2 190; CHECK: %c2 = and i32 %X, 65535 191; CHECK: ret i32 %c2 192} 193 194define i1 @test24(i1 %C) { 195 %X = select i1 %C, i32 14, i32 1234 ; <i32> [#uses=1] 196 ;; Fold cast into select 197 %c = icmp ne i32 %X, 0 ; <i1> [#uses=1] 198 ret i1 %c 199; CHECK: ret i1 true 200} 201 202define void @test25(i32** %P) { 203 %c = bitcast i32** %P to float** ; <float**> [#uses=1] 204 ;; Fold cast into null 205 store float* null, float** %c 206 ret void 207; CHECK: store i32* null, i32** %P 208; CHECK: ret void 209} 210 211define i32 @test26(float %F) { 212 ;; no need to cast from float->double. 213 %c = fpext float %F to double ; <double> [#uses=1] 214 %D = fptosi double %c to i32 ; <i32> [#uses=1] 215 ret i32 %D 216; CHECK: %D = fptosi float %F to i32 217; CHECK: ret i32 %D 218} 219 220define [4 x float]* @test27([9 x [4 x float]]* %A) { 221 %c = bitcast [9 x [4 x float]]* %A to [4 x float]* ; <[4 x float]*> [#uses=1] 222 ret [4 x float]* %c 223; CHECK: %c = getelementptr inbounds [9 x [4 x float]]* %A, i64 0, i64 0 224; CHECK: ret [4 x float]* %c 225} 226 227define float* @test28([4 x float]* %A) { 228 %c = bitcast [4 x float]* %A to float* ; <float*> [#uses=1] 229 ret float* %c 230; CHECK: %c = getelementptr inbounds [4 x float]* %A, i64 0, i64 0 231; CHECK: ret float* %c 232} 233 234define i32 @test29(i32 %c1, i32 %c2) { 235 %tmp1 = trunc i32 %c1 to i8 ; <i8> [#uses=1] 236 %tmp4.mask = trunc i32 %c2 to i8 ; <i8> [#uses=1] 237 %tmp = or i8 %tmp4.mask, %tmp1 ; <i8> [#uses=1] 238 %tmp10 = zext i8 %tmp to i32 ; <i32> [#uses=1] 239 ret i32 %tmp10 240; CHECK: %tmp2 = or i32 %c2, %c1 241; CHECK: %tmp10 = and i32 %tmp2, 255 242; CHECK: ret i32 %tmp10 243} 244 245define i32 @test30(i32 %c1) { 246 %c2 = trunc i32 %c1 to i8 ; <i8> [#uses=1] 247 %c3 = xor i8 %c2, 1 ; <i8> [#uses=1] 248 %c4 = zext i8 %c3 to i32 ; <i32> [#uses=1] 249 ret i32 %c4 250; CHECK: %c3 = and i32 %c1, 255 251; CHECK: %c4 = xor i32 %c3, 1 252; CHECK: ret i32 %c4 253} 254 255define i1 @test31(i64 %A) { 256 %B = trunc i64 %A to i32 ; <i32> [#uses=1] 257 %C = and i32 %B, 42 ; <i32> [#uses=1] 258 %D = icmp eq i32 %C, 10 ; <i1> [#uses=1] 259 ret i1 %D 260; CHECK: %C = and i64 %A, 42 261; CHECK: %D = icmp eq i64 %C, 10 262; CHECK: ret i1 %D 263} 264 265define i32 @test33(i32 %c1) { 266 %x = bitcast i32 %c1 to float ; <float> [#uses=1] 267 %y = bitcast float %x to i32 ; <i32> [#uses=1] 268 ret i32 %y 269; CHECK: ret i32 %c1 270} 271 272define i16 @test34(i16 %a) { 273 %c1 = zext i16 %a to i32 ; <i32> [#uses=1] 274 %tmp21 = lshr i32 %c1, 8 ; <i32> [#uses=1] 275 %c2 = trunc i32 %tmp21 to i16 ; <i16> [#uses=1] 276 ret i16 %c2 277; CHECK: %tmp21 = lshr i16 %a, 8 278; CHECK: ret i16 %tmp21 279} 280 281define i16 @test35(i16 %a) { 282 %c1 = bitcast i16 %a to i16 ; <i16> [#uses=1] 283 %tmp2 = lshr i16 %c1, 8 ; <i16> [#uses=1] 284 %c2 = bitcast i16 %tmp2 to i16 ; <i16> [#uses=1] 285 ret i16 %c2 286; CHECK: %tmp2 = lshr i16 %a, 8 287; CHECK: ret i16 %tmp2 288} 289 290; icmp sgt i32 %a, -1 291; rdar://6480391 292define i1 @test36(i32 %a) { 293 %b = lshr i32 %a, 31 294 %c = trunc i32 %b to i8 295 %d = icmp eq i8 %c, 0 296 ret i1 %d 297; CHECK: %d = icmp sgt i32 %a, -1 298; CHECK: ret i1 %d 299} 300 301; ret i1 false 302define i1 @test37(i32 %a) { 303 %b = lshr i32 %a, 31 304 %c = or i32 %b, 512 305 %d = trunc i32 %c to i8 306 %e = icmp eq i8 %d, 11 307 ret i1 %e 308; CHECK: ret i1 false 309} 310 311define i64 @test38(i32 %a) { 312 %1 = icmp eq i32 %a, -2 313 %2 = zext i1 %1 to i8 314 %3 = xor i8 %2, 1 315 %4 = zext i8 %3 to i64 316 ret i64 %4 317; CHECK: %1 = icmp ne i32 %a, -2 318; CHECK: %2 = zext i1 %1 to i64 319; CHECK: ret i64 %2 320} 321 322define i16 @test39(i16 %a) { 323 %tmp = zext i16 %a to i32 324 %tmp21 = lshr i32 %tmp, 8 325 %tmp5 = shl i32 %tmp, 8 326 %tmp.upgrd.32 = or i32 %tmp21, %tmp5 327 %tmp.upgrd.3 = trunc i32 %tmp.upgrd.32 to i16 328 ret i16 %tmp.upgrd.3 329; CHECK: @test39 330; CHECK: %tmp.upgrd.32 = call i16 @llvm.bswap.i16(i16 %a) 331; CHECK: ret i16 %tmp.upgrd.32 332} 333 334define i16 @test40(i16 %a) { 335 %tmp = zext i16 %a to i32 336 %tmp21 = lshr i32 %tmp, 9 337 %tmp5 = shl i32 %tmp, 8 338 %tmp.upgrd.32 = or i32 %tmp21, %tmp5 339 %tmp.upgrd.3 = trunc i32 %tmp.upgrd.32 to i16 340 ret i16 %tmp.upgrd.3 341; CHECK: @test40 342; CHECK: %tmp21 = lshr i16 %a, 9 343; CHECK: %tmp5 = shl i16 %a, 8 344; CHECK: %tmp.upgrd.32 = or i16 %tmp21, %tmp5 345; CHECK: ret i16 %tmp.upgrd.32 346} 347 348; PR1263 349define i32* @test41(i32* %tmp1) { 350 %tmp64 = bitcast i32* %tmp1 to { i32 }* 351 %tmp65 = getelementptr { i32 }* %tmp64, i32 0, i32 0 352 ret i32* %tmp65 353; CHECK: @test41 354; CHECK: ret i32* %tmp1 355} 356 357define i32 @test42(i32 %X) { 358 %Y = trunc i32 %X to i8 ; <i8> [#uses=1] 359 %Z = zext i8 %Y to i32 ; <i32> [#uses=1] 360 ret i32 %Z 361; CHECK: @test42 362; CHECK: %Z = and i32 %X, 255 363} 364 365; rdar://6598839 366define zeroext i64 @test43(i8 zeroext %on_off) nounwind readonly { 367 %A = zext i8 %on_off to i32 368 %B = add i32 %A, -1 369 %C = sext i32 %B to i64 370 ret i64 %C ;; Should be (add (zext i8 -> i64), -1) 371; CHECK: @test43 372; CHECK-NEXT: %A = zext i8 %on_off to i64 373; CHECK-NEXT: %B = add i64 %A, -1 374; CHECK-NEXT: ret i64 %B 375} 376 377define i64 @test44(i8 %T) { 378 %A = zext i8 %T to i16 379 %B = or i16 %A, 1234 380 %C = zext i16 %B to i64 381 ret i64 %C 382; CHECK: @test44 383; CHECK-NEXT: %A = zext i8 %T to i64 384; CHECK-NEXT: %B = or i64 %A, 1234 385; CHECK-NEXT: ret i64 %B 386} 387 388define i64 @test45(i8 %A, i64 %Q) { 389 %D = trunc i64 %Q to i32 ;; should be removed 390 %B = sext i8 %A to i32 391 %C = or i32 %B, %D 392 %E = zext i32 %C to i64 393 ret i64 %E 394; CHECK: @test45 395; CHECK-NEXT: %B = sext i8 %A to i64 396; CHECK-NEXT: %C = or i64 %B, %Q 397; CHECK-NEXT: %E = and i64 %C, 4294967295 398; CHECK-NEXT: ret i64 %E 399} 400 401 402define i64 @test46(i64 %A) { 403 %B = trunc i64 %A to i32 404 %C = and i32 %B, 42 405 %D = shl i32 %C, 8 406 %E = zext i32 %D to i64 407 ret i64 %E 408; CHECK: @test46 409; CHECK-NEXT: %C = shl i64 %A, 8 410; CHECK-NEXT: %D = and i64 %C, 10752 411; CHECK-NEXT: ret i64 %D 412} 413 414define i64 @test47(i8 %A) { 415 %B = sext i8 %A to i32 416 %C = or i32 %B, 42 417 %E = zext i32 %C to i64 418 ret i64 %E 419; CHECK: @test47 420; CHECK-NEXT: %B = sext i8 %A to i64 421; CHECK-NEXT: %C = and i64 %B, 4294967253 422; CHECK-NEXT: %E = or i64 %C, 42 423; CHECK-NEXT: ret i64 %E 424} 425 426define i64 @test48(i8 %A, i8 %a) { 427 %b = zext i8 %a to i32 428 %B = zext i8 %A to i32 429 %C = shl i32 %B, 8 430 %D = or i32 %C, %b 431 %E = zext i32 %D to i64 432 ret i64 %E 433; CHECK: @test48 434; CHECK-NEXT: %b = zext i8 %a to i64 435; CHECK-NEXT: %B = zext i8 %A to i64 436; CHECK-NEXT: %C = shl nuw nsw i64 %B, 8 437; CHECK-NEXT: %D = or i64 %C, %b 438; CHECK-NEXT: ret i64 %D 439} 440 441define i64 @test49(i64 %A) { 442 %B = trunc i64 %A to i32 443 %C = or i32 %B, 1 444 %D = sext i32 %C to i64 445 ret i64 %D 446; CHECK: @test49 447; CHECK-NEXT: %C = shl i64 %A, 32 448; CHECK-NEXT: ashr exact i64 %C, 32 449; CHECK-NEXT: %D = or i64 {{.*}}, 1 450; CHECK-NEXT: ret i64 %D 451} 452 453define i64 @test50(i64 %A) { 454 %a = lshr i64 %A, 2 455 %B = trunc i64 %a to i32 456 %D = add i32 %B, -1 457 %E = sext i32 %D to i64 458 ret i64 %E 459; CHECK: @test50 460; CHECK-NEXT: shl i64 %A, 30 461; CHECK-NEXT: add i64 {{.*}}, -4294967296 462; CHECK-NEXT: %sext = ashr i64 {{.*}}, 32 463; CHECK-NEXT: ret i64 %sext 464} 465 466define i64 @test51(i64 %A, i1 %cond) { 467 %B = trunc i64 %A to i32 468 %C = and i32 %B, -2 469 %D = or i32 %B, 1 470 %E = select i1 %cond, i32 %C, i32 %D 471 %F = sext i32 %E to i64 472 ret i64 %F 473; CHECK: @test51 474 475; FIXME: disabled, see PR5997 476; HECK-NEXT: %C = and i64 %A, 4294967294 477; HECK-NEXT: %D = or i64 %A, 1 478; HECK-NEXT: %E = select i1 %cond, i64 %C, i64 %D 479; HECK-NEXT: %sext = shl i64 %E, 32 480; HECK-NEXT: %F = ashr i64 %sext, 32 481; HECK-NEXT: ret i64 %F 482} 483 484define i32 @test52(i64 %A) { 485 %B = trunc i64 %A to i16 486 %C = or i16 %B, -32574 487 %D = and i16 %C, -25350 488 %E = zext i16 %D to i32 489 ret i32 %E 490; CHECK: @test52 491; CHECK-NEXT: %B = trunc i64 %A to i32 492; CHECK-NEXT: %C = and i32 %B, 7224 493; CHECK-NEXT: %D = or i32 %C, 32962 494; CHECK-NEXT: ret i32 %D 495} 496 497define i64 @test53(i32 %A) { 498 %B = trunc i32 %A to i16 499 %C = or i16 %B, -32574 500 %D = and i16 %C, -25350 501 %E = zext i16 %D to i64 502 ret i64 %E 503; CHECK: @test53 504; CHECK-NEXT: %B = zext i32 %A to i64 505; CHECK-NEXT: %C = and i64 %B, 7224 506; CHECK-NEXT: %D = or i64 %C, 32962 507; CHECK-NEXT: ret i64 %D 508} 509 510define i32 @test54(i64 %A) { 511 %B = trunc i64 %A to i16 512 %C = or i16 %B, -32574 513 %D = and i16 %C, -25350 514 %E = sext i16 %D to i32 515 ret i32 %E 516; CHECK: @test54 517; CHECK-NEXT: %B = trunc i64 %A to i32 518; CHECK-NEXT: %C = and i32 %B, 7224 519; CHECK-NEXT: %D = or i32 %C, -32574 520; CHECK-NEXT: ret i32 %D 521} 522 523define i64 @test55(i32 %A) { 524 %B = trunc i32 %A to i16 525 %C = or i16 %B, -32574 526 %D = and i16 %C, -25350 527 %E = sext i16 %D to i64 528 ret i64 %E 529; CHECK: @test55 530; CHECK-NEXT: %B = zext i32 %A to i64 531; CHECK-NEXT: %C = and i64 %B, 7224 532; CHECK-NEXT: %D = or i64 %C, -32574 533; CHECK-NEXT: ret i64 %D 534} 535 536define i64 @test56(i16 %A) nounwind { 537 %tmp353 = sext i16 %A to i32 538 %tmp354 = lshr i32 %tmp353, 5 539 %tmp355 = zext i32 %tmp354 to i64 540 ret i64 %tmp355 541; CHECK: @test56 542; CHECK-NEXT: %tmp353 = sext i16 %A to i64 543; CHECK-NEXT: %tmp354 = lshr i64 %tmp353, 5 544; CHECK-NEXT: %tmp355 = and i64 %tmp354, 134217727 545; CHECK-NEXT: ret i64 %tmp355 546} 547 548define i64 @test57(i64 %A) nounwind { 549 %B = trunc i64 %A to i32 550 %C = lshr i32 %B, 8 551 %E = zext i32 %C to i64 552 ret i64 %E 553; CHECK: @test57 554; CHECK-NEXT: %C = lshr i64 %A, 8 555; CHECK-NEXT: %E = and i64 %C, 16777215 556; CHECK-NEXT: ret i64 %E 557} 558 559define i64 @test58(i64 %A) nounwind { 560 %B = trunc i64 %A to i32 561 %C = lshr i32 %B, 8 562 %D = or i32 %C, 128 563 %E = zext i32 %D to i64 564 ret i64 %E 565 566; CHECK: @test58 567; CHECK-NEXT: %C = lshr i64 %A, 8 568; CHECK-NEXT: %D = and i64 %C, 16777087 569; CHECK-NEXT: %E = or i64 %D, 128 570; CHECK-NEXT: ret i64 %E 571} 572 573define i64 @test59(i8 %A, i8 %B) nounwind { 574 %C = zext i8 %A to i32 575 %D = shl i32 %C, 4 576 %E = and i32 %D, 48 577 %F = zext i8 %B to i32 578 %G = lshr i32 %F, 4 579 %H = or i32 %G, %E 580 %I = zext i32 %H to i64 581 ret i64 %I 582; CHECK: @test59 583; CHECK-NEXT: %C = zext i8 %A to i64 584; CHECK-NOT: i32 585; CHECK: %F = zext i8 %B to i64 586; CHECK-NOT: i32 587; CHECK: ret i64 %H 588} 589 590define <3 x i32> @test60(<4 x i32> %call4) nounwind { 591 %tmp11 = bitcast <4 x i32> %call4 to i128 592 %tmp9 = trunc i128 %tmp11 to i96 593 %tmp10 = bitcast i96 %tmp9 to <3 x i32> 594 ret <3 x i32> %tmp10 595 596; CHECK: @test60 597; CHECK-NEXT: shufflevector 598; CHECK-NEXT: ret 599} 600 601define <4 x i32> @test61(<3 x i32> %call4) nounwind { 602 %tmp11 = bitcast <3 x i32> %call4 to i96 603 %tmp9 = zext i96 %tmp11 to i128 604 %tmp10 = bitcast i128 %tmp9 to <4 x i32> 605 ret <4 x i32> %tmp10 606; CHECK: @test61 607; CHECK-NEXT: shufflevector 608; CHECK-NEXT: ret 609} 610 611define <4 x i32> @test62(<3 x float> %call4) nounwind { 612 %tmp11 = bitcast <3 x float> %call4 to i96 613 %tmp9 = zext i96 %tmp11 to i128 614 %tmp10 = bitcast i128 %tmp9 to <4 x i32> 615 ret <4 x i32> %tmp10 616; CHECK: @test62 617; CHECK-NEXT: bitcast 618; CHECK-NEXT: shufflevector 619; CHECK-NEXT: ret 620} 621 622; PR7311 - Don't create invalid IR on scalar->vector cast. 623define <2 x float> @test63(i64 %tmp8) nounwind { 624entry: 625 %a = bitcast i64 %tmp8 to <2 x i32> 626 %vcvt.i = uitofp <2 x i32> %a to <2 x float> 627 ret <2 x float> %vcvt.i 628; CHECK: @test63 629; CHECK: bitcast 630; CHECK: uitofp 631} 632 633define <4 x float> @test64(<4 x float> %c) nounwind { 634 %t0 = bitcast <4 x float> %c to <4 x i32> 635 %t1 = bitcast <4 x i32> %t0 to <4 x float> 636 ret <4 x float> %t1 637; CHECK: @test64 638; CHECK-NEXT: ret <4 x float> %c 639} 640 641define <4 x float> @test65(<4 x float> %c) nounwind { 642 %t0 = bitcast <4 x float> %c to <2 x double> 643 %t1 = bitcast <2 x double> %t0 to <4 x float> 644 ret <4 x float> %t1 645; CHECK: @test65 646; CHECK-NEXT: ret <4 x float> %c 647} 648 649define <2 x float> @test66(<2 x float> %c) nounwind { 650 %t0 = bitcast <2 x float> %c to double 651 %t1 = bitcast double %t0 to <2 x float> 652 ret <2 x float> %t1 653; CHECK: @test66 654; CHECK-NEXT: ret <2 x float> %c 655} 656 657define float @test2c() { 658 ret float extractelement (<2 x float> bitcast (double bitcast (<2 x float> <float -1.000000e+00, float -1.000000e+00> to double) to <2 x float>), i32 0) 659; CHECK: @test2c 660; CHECK-NOT: extractelement 661} 662 663define i64 @test_mmx(<2 x i32> %c) nounwind { 664 %A = bitcast <2 x i32> %c to x86_mmx 665 %B = bitcast x86_mmx %A to <2 x i32> 666 %C = bitcast <2 x i32> %B to i64 667 ret i64 %C 668; CHECK: @test_mmx 669; CHECK-NOT: x86_mmx 670} 671 672define i64 @test_mmx_const(<2 x i32> %c) nounwind { 673 %A = bitcast <2 x i32> zeroinitializer to x86_mmx 674 %B = bitcast x86_mmx %A to <2 x i32> 675 %C = bitcast <2 x i32> %B to i64 676 ret i64 %C 677; CHECK: @test_mmx_const 678; CHECK-NOT: x86_mmx 679} 680