1; This test makes sure that div instructions are properly eliminated. 2 3; RUN: opt < %s -instcombine -S | FileCheck %s 4 5define i32 @test1(i32 %A) { 6 %B = sdiv i32 %A, 1 ; <i32> [#uses=1] 7 ret i32 %B 8; CHECK: @test1 9; CHECK-NEXT: ret i32 %A 10} 11 12define i32 @test2(i32 %A) { 13 ; => Shift 14 %B = udiv i32 %A, 8 ; <i32> [#uses=1] 15 ret i32 %B 16; CHECK: @test2 17; CHECK-NEXT: lshr i32 %A, 3 18} 19 20define i32 @test3(i32 %A) { 21 ; => 0, don't need to keep traps 22 %B = sdiv i32 0, %A ; <i32> [#uses=1] 23 ret i32 %B 24; CHECK: @test3 25; CHECK-NEXT: ret i32 0 26} 27 28define i32 @test4(i32 %A) { 29 ; 0-A 30 %B = sdiv i32 %A, -1 ; <i32> [#uses=1] 31 ret i32 %B 32; CHECK: @test4 33; CHECK-NEXT: sub i32 0, %A 34} 35 36define i32 @test5(i32 %A) { 37 %B = udiv i32 %A, -16 ; <i32> [#uses=1] 38 %C = udiv i32 %B, -4 ; <i32> [#uses=1] 39 ret i32 %C 40; CHECK: @test5 41; CHECK-NEXT: ret i32 0 42} 43 44define i1 @test6(i32 %A) { 45 %B = udiv i32 %A, 123 ; <i32> [#uses=1] 46 ; A < 123 47 %C = icmp eq i32 %B, 0 ; <i1> [#uses=1] 48 ret i1 %C 49; CHECK: @test6 50; CHECK-NEXT: icmp ult i32 %A, 123 51} 52 53define i1 @test7(i32 %A) { 54 %B = udiv i32 %A, 10 ; <i32> [#uses=1] 55 ; A >= 20 && A < 30 56 %C = icmp eq i32 %B, 2 ; <i1> [#uses=1] 57 ret i1 %C 58; CHECK: @test7 59; CHECK-NEXT: add i32 %A, -20 60; CHECK-NEXT: icmp ult i32 61} 62 63define i1 @test8(i8 %A) { 64 %B = udiv i8 %A, 123 ; <i8> [#uses=1] 65 ; A >= 246 66 %C = icmp eq i8 %B, 2 ; <i1> [#uses=1] 67 ret i1 %C 68; CHECK: @test8 69; CHECK-NEXT: icmp ugt i8 %A, -11 70} 71 72define i1 @test9(i8 %A) { 73 %B = udiv i8 %A, 123 ; <i8> [#uses=1] 74 ; A < 246 75 %C = icmp ne i8 %B, 2 ; <i1> [#uses=1] 76 ret i1 %C 77; CHECK: @test9 78; CHECK-NEXT: icmp ult i8 %A, -10 79} 80 81define i32 @test10(i32 %X, i1 %C) { 82 %V = select i1 %C, i32 64, i32 8 ; <i32> [#uses=1] 83 %R = udiv i32 %X, %V ; <i32> [#uses=1] 84 ret i32 %R 85; CHECK: @test10 86; CHECK-NEXT: select i1 %C, i32 6, i32 3 87; CHECK-NEXT: lshr i32 %X 88} 89 90define i32 @test11(i32 %X, i1 %C) { 91 %A = select i1 %C, i32 1024, i32 32 ; <i32> [#uses=1] 92 %B = udiv i32 %X, %A ; <i32> [#uses=1] 93 ret i32 %B 94; CHECK: @test11 95; CHECK-NEXT: select i1 %C, i32 10, i32 5 96; CHECK-NEXT: lshr i32 %X 97} 98 99; PR2328 100define i32 @test12(i32 %x) nounwind { 101 %tmp3 = udiv i32 %x, %x ; 1 102 ret i32 %tmp3 103; CHECK: @test12 104; CHECK-NEXT: ret i32 1 105} 106 107define i32 @test13(i32 %x) nounwind { 108 %tmp3 = sdiv i32 %x, %x ; 1 109 ret i32 %tmp3 110; CHECK: @test13 111; CHECK-NEXT: ret i32 1 112} 113 114define i32 @test14(i8 %x) nounwind { 115 %zext = zext i8 %x to i32 116 %div = udiv i32 %zext, 257 ; 0 117 ret i32 %div 118; CHECK: @test14 119; CHECK-NEXT: ret i32 0 120} 121 122; PR9814 123define i32 @test15(i32 %a, i32 %b) nounwind { 124 %shl = shl i32 1, %b 125 %div = lshr i32 %shl, 2 126 %div2 = udiv i32 %a, %div 127 ret i32 %div2 128; CHECK: @test15 129; CHECK-NEXT: add i32 %b, -2 130; CHECK-NEXT: lshr i32 %a, 131; CHECK-NEXT: ret i32 132} 133 134 135