1; Show that we know how to translate clz. 2 3; REQUIRES: allow_dump 4 5; Compile using standalone assembler. 6; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -Om1 \ 7; RUN: | FileCheck %s --check-prefix=ASM 8 9; Show bytes in assembled standalone code. 10; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \ 11; RUN: --args -Om1 | FileCheck %s --check-prefix=DIS 12 13; Compile using integrated assembler. 14; RUN: %p2i --filetype=iasm -i %s --target=arm32 --args -Om1 \ 15; RUN: | FileCheck %s --check-prefix=IASM 16 17; Show bytes in assembled integrated code. 18; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \ 19; RUN: --args -Om1 | FileCheck %s --check-prefix=DIS 20 21declare i32 @llvm.ctlz.i32(i32, i1) 22 23define internal i32 @testClz(i32 %a) { 24; ASM-LABEL:testClz: 25; DIS-LABEL:00000000 <testClz>: 26; IASM-LABEL:testClz: 27 28entry: 29; ASM-NEXT:.LtestClz$entry: 30; IASM-NEXT:.LtestClz$entry: 31 32; ASM-NEXT: sub sp, sp, #8 33; DIS-NEXT: 0: e24dd008 34; IASM-NEXT: .byte 0x8 35; IASM-NEXT: .byte 0xd0 36; IASM-NEXT: .byte 0x4d 37; IASM-NEXT: .byte 0xe2 38 39; ASM-NEXT: str r0, [sp, #4] 40; ASM-NEXT: # [sp, #4] = def.pseudo 41; DIS-NEXT: 4: e58d0004 42; IASM-NEXT: .byte 0x4 43; IASM-NEXT: .byte 0x0 44; IASM-NEXT: .byte 0x8d 45; IASM-NEXT: .byte 0xe5 46 47 %x = call i32 @llvm.ctlz.i32(i32 %a, i1 0) 48 49; ASM-NEXT: ldr r0, [sp, #4] 50; DIS-NEXT: 8: e59d0004 51; IASM-NEXT: .byte 0x4 52; IASM-NEXT: .byte 0x0 53; IASM-NEXT: .byte 0x9d 54; IASM-NEXT: .byte 0xe5 55 56; ASM-NEXT: clz r0, r0 57; DIS-NEXT: c: e16f0f10 58; IASM-NEXT: .byte 0x10 59; IASM-NEXT: .byte 0xf 60; IASM-NEXT: .byte 0x6f 61; IASM-NEXT: .byte 0xe1 62 63 ret i32 %x 64} 65