1; Tests MVN instruction. 2 3; REQUIRES: allow_dump 4 5; Compile using standalone assembler. 6; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -Om1 \ 7; RUN: | FileCheck %s --check-prefix=ASM 8 9; Show bytes in assembled standalone code. 10; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \ 11; RUN: --args -Om1 | FileCheck %s --check-prefix=DIS 12 13; Compile using integrated assembler. 14; RUN: %p2i --filetype=iasm -i %s --target=arm32 --args -Om1 \ 15; RUN: | FileCheck %s --check-prefix=IASM 16 17; Show bytes in assembled integrated code. 18; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \ 19; RUN: --args -Om1 | FileCheck %s --check-prefix=DIS 20 21define internal void @mvnEx(i32 %a, i32 %b) { 22; ASM-LABEL:mvnEx: 23; DIS-LABEL:00000000 <mvnEx>: 24; IASM-LABEL:mvnEx: 25 26entry: 27; ASM-NEXT:.LmvnEx$entry: 28; IASM-NEXT:.LmvnEx$entry: 29 30; ASM-NEXT: sub sp, sp, #24 31; DIS-NEXT: 0: e24dd018 32; IASM-NEXT: .byte 0x18 33; IASM-NEXT: .byte 0xd0 34; IASM-NEXT: .byte 0x4d 35; IASM-NEXT: .byte 0xe2 36 37; ASM-NEXT: str r0, [sp, #20] 38; ASM-NEXT: # [sp, #20] = def.pseudo 39; DIS-NEXT: 4: e58d0014 40; IASM-NEXT: .byte 0x14 41; IASM-NEXT: .byte 0x0 42; IASM-NEXT: .byte 0x8d 43; IASM-NEXT: .byte 0xe5 44 45; ASM-NEXT: str r1, [sp, #16] 46; ASM-NEXT: # [sp, #16] = def.pseudo 47; DIS-NEXT: 8: e58d1010 48; IASM-NEXT: .byte 0x10 49; IASM-NEXT: .byte 0x10 50; IASM-NEXT: .byte 0x8d 51; IASM-NEXT: .byte 0xe5 52 53 %b.arg_trunc = trunc i32 %b to i1 54 55; ASM-NEXT: ldr r0, [sp, #16] 56; DIS-NEXT: c: e59d0010 57; IASM-NEXT: .byte 0x10 58; IASM-NEXT: .byte 0x0 59; IASM-NEXT: .byte 0x9d 60; IASM-NEXT: .byte 0xe5 61 62; ASM-NEXT: and r0, r0, #1 63; DIS-NEXT: 10: e2000001 64; IASM-NEXT: .byte 0x1 65; IASM-NEXT: .byte 0x0 66; IASM-NEXT: .byte 0x0 67; IASM-NEXT: .byte 0xe2 68 69; ASM-NEXT: strb r0, [sp, #12] 70; ASM-NEXT: # [sp, #12] = def.pseudo 71; DIS-NEXT: 14: e5cd000c 72; IASM-NEXT: .byte 0xc 73; IASM-NEXT: .byte 0x0 74; IASM-NEXT: .byte 0xcd 75; IASM-NEXT: .byte 0xe5 76 77 %a.arg_trunc = trunc i32 %a to i1 78 79; ASM-NEXT: ldr r0, [sp, #20] 80; DIS-NEXT: 18: e59d0014 81; IASM-NEXT: .byte 0x14 82; IASM-NEXT: .byte 0x0 83; IASM-NEXT: .byte 0x9d 84; IASM-NEXT: .byte 0xe5 85 86; ASM-NEXT: and r0, r0, #1 87; DIS-NEXT: 1c: e2000001 88; IASM-NEXT: .byte 0x1 89; IASM-NEXT: .byte 0x0 90; IASM-NEXT: .byte 0x0 91; IASM-NEXT: .byte 0xe2 92 93; ASM-NEXT: strb r0, [sp, #8] 94; ASM-NEXT: # [sp, #8] = def.pseudo 95; DIS-NEXT: 20: e5cd0008 96; IASM-NEXT: .byte 0x8 97; IASM-NEXT: .byte 0x0 98; IASM-NEXT: .byte 0xcd 99; IASM-NEXT: .byte 0xe5 100 101 %conv = zext i1 %a.arg_trunc to i32 102 103; ASM-NEXT: ldrb r0, [sp, #8] 104; DIS-NEXT: 24: e5dd0008 105; IASM-NEXT: .byte 0x8 106; IASM-NEXT: .byte 0x0 107; IASM-NEXT: .byte 0xdd 108; IASM-NEXT: .byte 0xe5 109 110; ASM-NEXT: str r0, [sp, #4] 111; ASM-NEXT: # [sp, #4] = def.pseudo 112; DIS-NEXT: 28: e58d0004 113; IASM-NEXT: .byte 0x4 114; IASM-NEXT: .byte 0x0 115; IASM-NEXT: .byte 0x8d 116; IASM-NEXT: .byte 0xe5 117 118 %ignore = sext i1 %b.arg_trunc to i32 119 120; ASM-NEXT: mov r0, #0 121; DIS-NEXT: 2c: e3a00000 122; IASM-NEXT: .byte 0x0 123; IASM-NEXT: .byte 0x0 124; IASM-NEXT: .byte 0xa0 125; IASM-NEXT: .byte 0xe3 126 127; ASM-NEXT: ldrb r1, [sp, #12] 128; DIS-NEXT: 30: e5dd100c 129; IASM-NEXT: .byte 0xc 130; IASM-NEXT: .byte 0x10 131; IASM-NEXT: .byte 0xdd 132; IASM-NEXT: .byte 0xe5 133 134; ASM-NEXT: tst r1, #1 135; DIS-NEXT: 34: e3110001 136; IASM-NEXT: .byte 0x1 137; IASM-NEXT: .byte 0x0 138; IASM-NEXT: .byte 0x11 139; IASM-NEXT: .byte 0xe3 140 141; ********* Use of MVN ******** 142; ASM-NEXT: mvn r1, #0 143; DIS-NEXT: 38: e3e01000 144; IASM-NEXT: .byte 0x0 145; IASM-NEXT: .byte 0x10 146; IASM-NEXT: .byte 0xe0 147; IASM-NEXT: .byte 0xe3 148 149; ASM-NEXT: movne r0, r1 150; DIS-NEXT: 3c: 11a00001 151; IASM-NEXT: .byte 0x1 152; IASM-NEXT: .byte 0x0 153; IASM-NEXT: .byte 0xa0 154; IASM-NEXT: .byte 0x11 155 156 ret void 157} 158