1; Show that we know how to translate vector store instructions. 2 3; Note: Uses -O2 to remove unnecessary loads/stores, resulting in only one VST1 4; instruction per function. 5 6; REQUIRES: allow_dump 7 8; Compile using standalone assembler. 9; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -O2 \ 10; RUN: -reg-use=q11,r5 \ 11; RUN: | FileCheck %s --check-prefix=ASM 12 13; Show bytes in assembled standalone code. 14; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \ 15; RUN: --args -O2 \ 16; RUN: -reg-use=q11,r5 \ 17; RUN: | FileCheck %s --check-prefix=DIS 18 19; Compile using integrated assembler. 20; RUN: %p2i --filetype=iasm -i %s --target=arm32 --args -O2 \ 21; RUN: -reg-use=q11,r5 \ 22; RUN: | FileCheck %s --check-prefix=IASM 23 24; Show bytes in assembled integrated code. 25; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \ 26; RUN: --args -O2 \ 27; RUN: -reg-use=q11,r5 \ 28; RUN: | FileCheck %s --check-prefix=DIS 29 30define internal void @testDerefFloat4(<4 x float>* %p, <4 x float> %v) { 31; ASM-LABEL: testDerefFloat4: 32; DIS-LABEL: {{.+}} <testDerefFloat4>: 33 34entry: 35 store <4 x float> %v, <4 x float>* %p, align 4 36; ASM: vst1.32 q11, [r5] 37; DIS: {{.+}}: f4456a8f 38; IASM-NOT: vst1.32 39 40 ret void 41} 42 43define internal void @testDeref4i32(<4 x i32> *%p, <4 x i32> %v) { 44; ASM-LABEL: testDeref4i32: 45; DIS-LABEL: {{.+}} <testDeref4i32>: 46 47entry: 48 store <4 x i32> %v, <4 x i32>* %p, align 4 49; ASM: vst1.32 q11, [r5] 50; DIS: {{.+}}: f4456a8f 51; IASM-NOT: vst1.32 52 53 ret void 54} 55 56define internal void @testDeref8i16(<8 x i16> *%p, <8 x i16> %v) { 57; ASM-LABEl: testDeref8i16: 58; DIS-LABEL: {{.+}} <testDeref8i16>: 59 60 store <8 x i16> %v, <8 x i16>* %p, align 2 61; ASM: vst1.16 q11, [r5] 62; DIS: {{.+}}: f4456a4f 63; IASM-NOT: vst1.16 64 65 ret void 66} 67 68define internal void @testDeref16i8(<16 x i8> *%p, <16 x i8> %v) { 69; ASM-LABEL: testDeref16i8: 70; DIS-LABEL: {{.+}} <testDeref16i8>: 71 72 store <16 x i8> %v, <16 x i8>* %p, align 1 73; ASM: vst1.8 q11, [r5] 74; DIS: {{.+}}: f4456a0f 75; IASM-NOT: vst1.8 76 77 ret void 78} 79